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authorArnd Bergmann <arnd@arndb.de>2024-07-08 21:33:23 +0200
committerArnd Bergmann <arnd@arndb.de>2024-07-08 21:33:23 +0200
commit43528789a0b9df73b318e9e8cbab3138d0187f2c (patch)
tree6a4c0b37a7fff08fc5fe4af682c5e308b89f1073 /net/sched/sch_taprio.c
parentfa38c957982fe581bf0d34679b9856b759c10cc5 (diff)
parentd8a7d89abb091fe4c1744241c7a40dbad570fd9e (diff)
Merge tag 'riscv-config-for-v6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/defconfig
RISC-V config update for v6.11 StarFive: Enable most of the options needed for the jh7100 based boards to be properly testable with defconfig. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-config-for-v6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: riscv: defconfig: Enable StarFive JH7110 drivers Link: https://lore.kernel.org/r/20240707-unused-outflank-aa127ccb2cfe@spud Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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