summaryrefslogtreecommitdiff
path: root/net/sched/cls_flower.c
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2020-01-05 11:15:31 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2020-01-05 11:15:31 -0800
commit768fc661d12559b0dbd99d941b3bf28fe92fd365 (patch)
tree2cfc324edc1225ddaeb2a57d1a7bd17ec3712b19 /net/sched/cls_flower.c
parent36487907f34131c7e3df5b1e6b30b4e3dfcdc0af (diff)
parent0e194d9da198936fe4fb4c1e031de0f7791c09b8 (diff)
Merge tag 'riscv/for-v5.5-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V fixes from Paul Walmsley: "Several fixes for RISC-V: - Fix function graph trace support - Prefix the CSR IRQ_* macro names with "RV_", to avoid collisions with macros elsewhere in the Linux kernel tree named "IRQ_TIMER" - Use __pa_symbol() when computing the physical address of a kernel symbol, rather than __pa() - Mark the RISC-V port as supporting GCOV One DT addition: - Describe the L2 cache controller in the FU540 DT file One documentation update: - Add patch acceptance guideline documentation" * tag 'riscv/for-v5.5-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: Documentation: riscv: add patch acceptance guidelines riscv: prefix IRQ_ macro names with an RV_ namespace clocksource: riscv: add notrace to riscv_sched_clock riscv: ftrace: correct the condition logic in function graph tracer riscv: dts: Add DT support for SiFive L2 cache controller riscv: gcov: enable gcov for RISC-V riscv: mm: use __pa_symbol for kernel symbols
Diffstat (limited to 'net/sched/cls_flower.c')
0 files changed, 0 insertions, 0 deletions