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author | Ajay Singh <ajay.kathat@microchip.com> | 2022-05-24 12:06:19 +0000 |
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committer | Kalle Valo <kvalo@kernel.org> | 2022-05-30 14:18:00 +0300 |
commit | fcf690b0b47494df51d214db5c5a714a400b0257 (patch) | |
tree | 1c193b3b1f599f179456327085270916c7f5d64a /net/dccp | |
parent | b88d28146c30a8e14f0f012d56ebf19b68a348f4 (diff) |
wifi: wilc1000: use correct sequence of RESET for chip Power-UP/Down
For power-up sequence, WILC expects RESET set to high 5ms after making
chip_en(enable) so corrected chip power-up sequence by making RESET high.
For Power-Down sequence, the correct sequence make RESET and CHIP_EN low
without any extra delay.
Fixes: ec031ac4792c ("wilc1000: Add reset/enable GPIO support to SPI driver")
Signed-off-by: Ajay Singh <ajay.kathat@microchip.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20220524120606.9675-1-ajay.kathat@microchip.com
Diffstat (limited to 'net/dccp')
0 files changed, 0 insertions, 0 deletions