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| author | Lukas Wunner <lukas@wunner.de> | 2024-01-13 19:06:56 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2024-01-25 18:10:07 +0100 |
| commit | 5e2400f11d4deec444ac00b73e96267e057fbb37 (patch) | |
| tree | eb37766a18efc32117ddfc73e9f3a67f8f79bf73 /lib/strnlen_user.c | |
| parent | 8412c47d68436b9f9a260039a4a773daa6824925 (diff) | |
arm64: dts: Fix TPM schema violations
Since commit 26c9d152ebf3 ("dt-bindings: tpm: Consolidate TCG TIS
bindings"), several issues are reported by "make dtbs_check" for arm64
devicetrees:
The compatible property needs to contain the chip's name in addition to
the generic "tcg,tpm_tis-spi" and the nodename needs to be "tpm@0"
rather than "cr50@0":
tpm@1: compatible: ['tcg,tpm_tis-spi'] is too short
from schema $id: http://devicetree.org/schemas/tpm/tcg,tpm_tis-spi.yaml#
cr50@0: $nodename:0: 'cr50@0' does not match '^tpm(@[0-9a-f]+)?$'
from schema $id: http://devicetree.org/schemas/tpm/google,cr50.yaml#
Fix these schema violations.
phyGATE-Tauri uses an Infineon SLB9670:
https://lore.kernel.org/all/ab45c82485fa272f74adf560cbb58ee60cc42689.camel@phytec.de/
Gateworks Venice uses an Atmel ATTPM20P:
https://trac.gateworks.com/wiki/tpm
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Diffstat (limited to 'lib/strnlen_user.c')
0 files changed, 0 insertions, 0 deletions