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authorMarc Zyngier <marc.zyngier@arm.com>2015-11-16 19:13:27 +0000
committerThomas Gleixner <tglx@linutronix.de>2015-11-17 14:25:58 +0100
commit92eda4ad4371225d6ccf9cded74315547e9a3153 (patch)
tree151830ddfb508dacb90b229191f9cd170d20e435 /kernel/trace
parent0eece2b22849c90b730815c893425a36b9d10fd5 (diff)
irqchip/gic: Clear enable bits before restoring them
When restoring the GIC state (after a suspend/resume cycle, for example), the driver directly writes the 'enabled' state it has saved by accessing GICD_ISENABLERn, which performs an OR operation between the value present in the register and the value we write. If whatever code that has run before we reentered the kernel has enabled an interrupt that was previously disabled, we won't restore that disabled state. Making sure we first clear the register (by writting to GICD_ICENABLERn) before restoring the enabled state. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Cc: <linux-arm-kernel@lists.infradead.org> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Russell King <linux@arm.linux.org.uk> Link: http://lkml.kernel.org/r/1447701208-18150-4-git-send-email-marc.zyngier@arm.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'kernel/trace')
0 files changed, 0 insertions, 0 deletions