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authorDanijel Slivka <danijel.slivka@amd.com>2024-03-27 23:56:23 +0100
committerAlex Deucher <alexander.deucher@amd.com>2024-04-09 22:02:37 -0400
commit3e2dacca540643ee35e3deb1d60873e7138a6af3 (patch)
tree4fb35366b2eee969e43377986479fc35eab24828 /io_uring/waitid.c
parentb7a1a0ef12b81957584fef7b61e2d5ec049c7209 (diff)
drm/amdgpu: use vm_update_mode=0 as default in sriov for gfx10.3 onwards
Apply this rule to all newer asics in sriov case. For asic with VF MMIO access protection avoid using CPU for VM table updates. CPU pagetable updates have issues with HDP flush as VF MMIO access protection blocks write to BIF_BX_DEV0_EPF0_VF0_HDP_MEM_COHERENCY_FLUSH_CNTL register during sriov runtime. Moved the check to amdgpu_device_init() to ensure it is done after amdgpu_device_ip_early_init() where the IP versions are discovered. Signed-off-by: Danijel Slivka <danijel.slivka@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'io_uring/waitid.c')
0 files changed, 0 insertions, 0 deletions