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| author | Doug Brown <doug@schmorgal.com> | 2022-12-03 16:51:17 -0800 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2022-12-04 13:11:40 +0100 |
| commit | e348b4014c31041e13ff370669ba3348c4d385e3 (patch) | |
| tree | 30dfcc77efd3a3f8e2a2be9da5d6aa467de63797 /include/soc | |
| parent | 1d9ae5a1356a61cef94b34e4ccb28986955e2fd2 (diff) | |
ARM: mmp: fix timer_read delay
timer_read() was using an empty 100-iteration loop to wait for the
TMR_CVWR register to capture the latest timer counter value. The delay
wasn't long enough. This resulted in CPU idle time being extremely
underreported on PXA168 with CONFIG_NO_HZ_IDLE=y.
Switch to the approach used in the vendor kernel, which implements the
capture delay by reading TMR_CVWR a few times instead.
Fixes: 49cbe78637eb ("[ARM] pxa: add base support for Marvell's PXA168 processor line")
Signed-off-by: Doug Brown <doug@schmorgal.com>
Link: https://lore.kernel.org/r/20221204005117.53452-3-doug@schmorgal.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'include/soc')
0 files changed, 0 insertions, 0 deletions