diff options
| author | Jon Arne Jørgensen <jonarne@jonarne.no> | 2013-08-03 09:19:37 -0300 |
|---|---|---|
| committer | Mauro Carvalho Chehab <m.chehab@samsung.com> | 2013-08-18 08:27:07 -0300 |
| commit | 2ccf12afe6da2145085056cebaae2149899f4f8c (patch) | |
| tree | c0043eeca9eedabfc337cbf07461970bff1c160b /include/media/saa7115.h | |
| parent | b9798bc160968107c82e119f2a59de25f6e70291 (diff) | |
[media] saa7115: Implement i2c_board_info.platform_data
This patch implements i2c_board_info.platform_data, and some options to
override the default initialization table for the GM7113C and SAA7113
chips.
Signed-off-by: Jon Arne Jørgensen <jonarne@jonarne.no>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Diffstat (limited to 'include/media/saa7115.h')
| -rw-r--r-- | include/media/saa7115.h | 64 |
1 files changed, 64 insertions, 0 deletions
diff --git a/include/media/saa7115.h b/include/media/saa7115.h index 407918625c80..e8d512a7592f 100644 --- a/include/media/saa7115.h +++ b/include/media/saa7115.h @@ -64,5 +64,69 @@ #define SAA7115_FREQ_FL_APLL (1 << 2) /* SA 3A[3], APLL, SAA7114/5 only */ #define SAA7115_FREQ_FL_DOUBLE_ASCLK (1 << 3) /* SA 39, LRDIV, SAA7114/5 only */ +/* ===== SAA7113 Config enums ===== */ + +/* Register 0x08 "Horizontal time constant" [Bit 3..4]: + * Should be set to "Fast Locking Mode" according to the datasheet, + * and that is the default setting in the gm7113c_init table. + * saa7113_init sets this value to "VTR Mode". */ +enum saa7113_r08_htc { + SAA7113_HTC_TV_MODE = 0x00, + SAA7113_HTC_VTR_MODE, /* Default for saa7113_init */ + SAA7113_HTC_FAST_LOCKING_MODE = 0x03 /* Default for gm7113c_init */ +}; + +/* Register 0x10 "Output format selection" [Bit 6..7]: + * Defaults to ITU_656 as specified in datasheet. */ +enum saa7113_r10_ofts { + SAA7113_OFTS_ITU_656 = 0x0, /* Default */ + SAA7113_OFTS_VFLAG_BY_VREF, + SAA7113_OFTS_VFLAG_BY_DATA_TYPE +}; + +/* Register 0x12 "Output control" [Bit 0..3 Or Bit 4..7]: + * This is used to select what data is output on the RTS0 and RTS1 pins. + * RTS1 [Bit 4..7] Defaults to DOT_IN. (This value can not be set for RTS0) + * RTS0 [Bit 0..3] Defaults to VIPB in gm7113c_init as specified + * in the datasheet, but is set to HREF_HS in the saa7113_init table. */ +enum saa7113_r12_rts { + SAA7113_RTS_DOT_IN = 0, /* OBS: Only for RTS1 (Default RTS1) */ + SAA7113_RTS_VIPB, /* Default RTS0 For gm7113c_init */ + SAA7113_RTS_GPSW, + SAA7115_RTS_HL, + SAA7113_RTS_VL, + SAA7113_RTS_DL, + SAA7113_RTS_PLIN, + SAA7113_RTS_HREF_HS, /* Default RTS0 For saa7113_init */ + SAA7113_RTS_HS, + SAA7113_RTS_HQ, + SAA7113_RTS_ODD, + SAA7113_RTS_VS, + SAA7113_RTS_V123, + SAA7113_RTS_VGATE, + SAA7113_RTS_VREF, + SAA7113_RTS_FID +}; + +struct saa7115_platform_data { + /* saa7113 only: Force the use of the gm7113c_init table, + * instead of the old saa7113_init table. */ + bool saa7113_force_gm7113c_init; + + /* SAA7113/GM7113C Specific configurations */ + enum saa7113_r08_htc *saa7113_r08_htc; /* [R_08 - Bit 3..4] */ + + bool *saa7113_r10_vrln; /* [R_10 - Bit 3] + Disabled for gm7113c_init + Enabled for saa7113c_init */ + enum saa7113_r10_ofts *saa7113_r10_ofts; /* [R_10 - Bit 6..7] */ + + enum saa7113_r12_rts *saa7113_r12_rts0; /* [R_12 - Bit 0..3] */ + enum saa7113_r12_rts *saa7113_r12_rts1; /* [R_12 - Bit 4..7] */ + + bool *saa7113_r13_adlsb; /* [R_13 - Bit 7] + Default disabled */ +}; + #endif |