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authorLinus Walleij <linus.walleij@linaro.org>2017-10-20 16:31:27 +0200
committerLinus Walleij <linus.walleij@linaro.org>2017-10-25 11:25:41 +0200
commit24efd94bc38290dc1d9775a1e767ed4685d8a79b (patch)
tree32e698c490b7ec9159ea16757a03c94af6341656 /include/linux
parentb3222f7147e028d31f965f193b6f995147c64651 (diff)
gpio: mmio: Make pin2mask() a private business
The vtable call pin2mask() was introducing a vtable function call in every gpiochip callback for a generic MMIO GPIO chip. This was not exactly efficient. (Maybe link-time optimization could get rid of it, I don't know.) After removing all external calls into this API we can make it a boolean flag in the struct gpio_chip call and sink the function into the gpio-mmio driver yielding encapsulation and potential speedups. Cc: Anton Vorontsov <anton@enomsg.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/gpio/driver.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h
index bda95a9b7b8c..ed04fa2a00a8 100644
--- a/include/linux/gpio/driver.h
+++ b/include/linux/gpio/driver.h
@@ -67,9 +67,9 @@ struct module;
* registers.
* @read_reg: reader function for generic GPIO
* @write_reg: writer function for generic GPIO
- * @pin2mask: some generic GPIO controllers work with the big-endian bits
- * notation, e.g. in a 8-bits register, GPIO7 is the least significant
- * bit. This callback assigns the right bit mask.
+ * @be_bits: if the generic GPIO has big endian bit order (bit 31 is representing
+ * line 0, bit 30 is line 1 ... bit 0 is line 31) this is set to true by the
+ * generic GPIO core. It is for internal housekeeping only.
* @reg_dat: data (in) register for generic GPIO
* @reg_set: output set register (out=high) for generic GPIO
* @reg_clr: output clear register (out=low) for generic GPIO
@@ -151,7 +151,7 @@ struct gpio_chip {
#if IS_ENABLED(CONFIG_GPIO_GENERIC)
unsigned long (*read_reg)(void __iomem *reg);
void (*write_reg)(void __iomem *reg, unsigned long data);
- unsigned long (*pin2mask)(struct gpio_chip *gc, unsigned int pin);
+ bool be_bits;
void __iomem *reg_dat;
void __iomem *reg_set;
void __iomem *reg_clr;