diff options
author | Richard Leitner <richard.leitner@skidata.com> | 2017-12-11 13:16:58 +0100 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2017-12-13 11:22:53 -0500 |
commit | a96684914adb4adb9f81faf6917e0673b92288d8 (patch) | |
tree | c1140d2c4f2df5c11bfc460bb1500cf1b11149a5 /include/linux/phy.h | |
parent | 3a30ae6ef3cba29c83ca791bde0d06f182d5678d (diff) |
phylib: add reset after clk enable support
Some PHYs need the refclk to be a continuous clock. Therefore they don't
allow turning it off and on again during operation. Nonetheless such a
clock switching is performed by some ETH drivers (namely FEC [1]) for
power saving reasons. An example for an affected PHY is the
SMSC/Microchip LAN8720 in "REF_CLK In Mode".
In order to provide a uniform method to overcome this problem this patch
adds a new phy_driver flag (PHY_RST_AFTER_CLK_EN) and corresponding
function phy_reset_after_clk_enable() to the phylib. These should be
used to trigger reset of the PHY after the refclk is switched on again.
[1] commit e8fcfcd5684a ("net: fec: optimize the clock management to save power")
Signed-off-by: Richard Leitner <richard.leitner@skidata.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/linux/phy.h')
-rw-r--r-- | include/linux/phy.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/phy.h b/include/linux/phy.h index d3037e2ffbc4..c4b4715caa21 100644 --- a/include/linux/phy.h +++ b/include/linux/phy.h @@ -59,6 +59,7 @@ #define PHY_HAS_INTERRUPT 0x00000001 #define PHY_IS_INTERNAL 0x00000002 +#define PHY_RST_AFTER_CLK_EN 0x00000004 #define MDIO_DEVICE_IS_PHY 0x80000000 /* Interface Mode definitions */ @@ -853,6 +854,7 @@ int phy_aneg_done(struct phy_device *phydev); int phy_stop_interrupts(struct phy_device *phydev); int phy_restart_aneg(struct phy_device *phydev); +int phy_reset_after_clk_enable(struct phy_device *phydev); static inline void phy_device_reset(struct phy_device *phydev, int value) { |