diff options
| author | Paul Mackerras <paulus@samba.org> | 2006-06-07 16:15:39 +1000 |
|---|---|---|
| committer | Paul Mackerras <paulus@samba.org> | 2006-06-09 21:24:16 +1000 |
| commit | e9370ae15dc2f8ba1e1889ce26f13cda565b6ecb (patch) | |
| tree | 338ed732f7a6607bc168795008e244f180876cda /include/asm-powerpc/processor.h | |
| parent | fab5db97e44f76461f76b24adfa8ccb14d4df498 (diff) | |
[PATCH] powerpc: Implement PR_[GS]ET_UNALIGN prctls for powerpc
This gives the ability to control whether alignment exceptions get
fixed up or reported to the process as a SIGBUS, using the existing
PR_SET_UNALIGN and PR_GET_UNALIGN prctls. We do not implement the
option of logging a message on alignment exceptions.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include/asm-powerpc/processor.h')
| -rw-r--r-- | include/asm-powerpc/processor.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/include/asm-powerpc/processor.h b/include/asm-powerpc/processor.h index fa6163268153..d2c2c95f913b 100644 --- a/include/asm-powerpc/processor.h +++ b/include/asm-powerpc/processor.h @@ -149,6 +149,7 @@ struct thread_struct { unsigned int val; /* Floating point status */ } fpscr; int fpexc_mode; /* floating-point exception mode */ + unsigned int align_ctl; /* alignment handling control */ #ifdef CONFIG_PPC64 unsigned long start_tb; /* Start purr when proc switched in */ unsigned long accum_tb; /* Total accumilated purr for process */ @@ -217,6 +218,12 @@ extern int set_fpexc_mode(struct task_struct *tsk, unsigned int val); extern int get_endian(struct task_struct *tsk, unsigned long adr); extern int set_endian(struct task_struct *tsk, unsigned int val); +#define GET_UNALIGN_CTL(tsk, adr) get_unalign_ctl((tsk), (adr)) +#define SET_UNALIGN_CTL(tsk, val) set_unalign_ctl((tsk), (val)) + +extern int get_unalign_ctl(struct task_struct *tsk, unsigned long adr); +extern int set_unalign_ctl(struct task_struct *tsk, unsigned int val); + static inline unsigned int __unpack_fe01(unsigned long msr_bits) { return ((msr_bits & MSR_FE0) >> 10) | ((msr_bits & MSR_FE1) >> 8); |