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authorDoug Brown <doug@schmorgal.com>2023-01-16 11:43:58 -0800
committerUlf Hansson <ulf.hansson@linaro.org>2023-01-24 11:56:41 +0100
commite41c48b4bcb3ceee43a101ba7d514483271fb2fb (patch)
tree03d56e43d27692ca30a00a4a41cda04a493b9481 /drivers
parentc7c60bf62820abfbfc7d154ade06a6043be0b479 (diff)
mmc: sdhci-pxav2: add optional core clock
Add ability to have an optional core clock just like the pxav3 driver. The PXA168 needs this because its SDHC controllers have separate core and io clocks that both need to be enabled. This also correctly matches the documented devicetree bindings for this driver. Reported-by: kernel test robot <lkp@intel.com> Reported-by: Dan Carpenter <error27@gmail.com> Signed-off-by: Doug Brown <doug@schmorgal.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20230116194401.20372-6-doug@schmorgal.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mmc/host/sdhci-pxav2.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/mmc/host/sdhci-pxav2.c b/drivers/mmc/host/sdhci-pxav2.c
index f5c86e1ba734..3141901e1558 100644
--- a/drivers/mmc/host/sdhci-pxav2.c
+++ b/drivers/mmc/host/sdhci-pxav2.c
@@ -191,7 +191,7 @@ static int sdhci_pxav2_probe(struct platform_device *pdev)
const struct sdhci_pxa_variant *variant;
int ret;
- struct clk *clk;
+ struct clk *clk, *clk_core;
host = sdhci_pltfm_init(pdev, NULL, 0);
if (IS_ERR(host))
@@ -214,6 +214,13 @@ static int sdhci_pxav2_probe(struct platform_device *pdev)
goto free;
}
+ clk_core = devm_clk_get_optional_enabled(dev, "core");
+ if (IS_ERR(clk_core)) {
+ ret = PTR_ERR(clk_core);
+ dev_err_probe(dev, ret, "failed to enable core clock\n");
+ goto disable_clk;
+ }
+
host->quirks = SDHCI_QUIRK_BROKEN_ADMA
| SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
| SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN;