diff options
| author | Prajna Rajendra Kumar <prajna.rajendrakumar@microchip.com> | 2024-05-14 11:45:07 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2024-05-27 01:33:15 +0100 |
| commit | a7ed3a11202d90939a3d00ffcc8cf50703cb7b35 (patch) | |
| tree | c9ce262f918d8a858be0d4ef6d867e67c3b3384e /drivers/spi | |
| parent | 3b4c0fbc19930af0904fb5995ed4e7b6ffe0b237 (diff) | |
spi: spi-microchip-core: Fix the number of chip selects supported
The SPI "hard" controller in PolarFire SoC has eight CS lines, but only
one CS line is wired. When the 'num-cs' property is not specified in
the device tree, the driver defaults to the MAX_CS value, which has
been fixed to 1 to match the hardware configuration; however, when the
'num-cs' property is explicitly defined in the device tree, it
overrides the default value.
Fixes: 9ac8d17694b6 ("spi: add support for microchip fpga spi controllers")
Signed-off-by: Prajna Rajendra Kumar <prajna.rajendrakumar@microchip.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://msgid.link/r/20240514104508.938448-3-prajna.rajendrakumar@microchip.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi')
| -rw-r--r-- | drivers/spi/spi-microchip-core.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/spi/spi-microchip-core.c b/drivers/spi/spi-microchip-core.c index 634364c7cfe6..c10de45aa472 100644 --- a/drivers/spi/spi-microchip-core.c +++ b/drivers/spi/spi-microchip-core.c @@ -21,7 +21,7 @@ #include <linux/spi/spi.h> #define MAX_LEN (0xffff) -#define MAX_CS (8) +#define MAX_CS (1) #define DEFAULT_FRAMESIZE (8) #define FIFO_DEPTH (32) #define CLK_GEN_MODE1_MAX (255) |