diff options
| author | Roy Pledge <roy.pledge@nxp.com> | 2017-09-18 16:39:43 -0400 |
|---|---|---|
| committer | Li Yang <leoyang.li@nxp.com> | 2017-09-22 13:33:07 -0500 |
| commit | e6e2df69c8321fcb5497a409a1a2a3139b15c3d8 (patch) | |
| tree | a75ba68290c69111fffe696588599de1fbdb3739 /drivers/soc/fsl/qbman/dpaa_sys.h | |
| parent | 219e8e0580cc441504b75e291401cf108e1a78f3 (diff) | |
soc/fsl/qbman: Rework portal mapping calls for ARM/PPC
Rework portal mapping for PPC and ARM. The PPC devices require a
cacheable coherent mapping while ARM will work with a non-cachable/write
combine mapping. This also eliminates the need for manual cache
flushes on ARM. This also fixes the code so sparse checking is clean.
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Diffstat (limited to 'drivers/soc/fsl/qbman/dpaa_sys.h')
| -rw-r--r-- | drivers/soc/fsl/qbman/dpaa_sys.h | 15 |
1 files changed, 11 insertions, 4 deletions
diff --git a/drivers/soc/fsl/qbman/dpaa_sys.h b/drivers/soc/fsl/qbman/dpaa_sys.h index 61cfdb396fe5..5a2c0af2489e 100644 --- a/drivers/soc/fsl/qbman/dpaa_sys.h +++ b/drivers/soc/fsl/qbman/dpaa_sys.h @@ -51,12 +51,12 @@ static inline void dpaa_flush(void *p) { + /* + * Only PPC needs to flush the cache currently - on ARM the mapping + * is non cacheable + */ #ifdef CONFIG_PPC flush_dcache_range((unsigned long)p, (unsigned long)p+64); -#elif defined(CONFIG_ARM) - __cpuc_flush_dcache_area(p, 64); -#elif defined(CONFIG_ARM64) - __flush_dcache_area(p, 64); #endif } @@ -102,4 +102,11 @@ static inline u8 dpaa_cyc_diff(u8 ringsize, u8 first, u8 last) int qbman_init_private_mem(struct device *dev, int idx, dma_addr_t *addr, size_t *size); +/* memremap() attributes for different platforms */ +#ifdef CONFIG_PPC +#define QBMAN_MEMREMAP_ATTR MEMREMAP_WB +#else +#define QBMAN_MEMREMAP_ATTR MEMREMAP_WC +#endif + #endif /* __DPAA_SYS_H */ |