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authorSiddharth Vadapalli <s-vadapalli@ti.com>2023-03-09 14:54:34 +0530
committerVinod Koul <vkoul@kernel.org>2023-04-12 22:15:27 +0530
commitec318c51b686841e36c924bc0e5a13a75e75b27b (patch)
treee920b7ac25faa20b1cb52af8edaf1e57e16fc5f4 /drivers/phy
parent73b46467cac027fe6cbe6585946726b53b80bfdb (diff)
phy: ti: j721e-wiz: Add SGMII support in WIZ driver for J721E
Enable full rate divider configuration support for J721E_WIZ_16G for SGMII. Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Reviewed-by: Roger Quadros <rogerq@kernel.org> Link: https://lore.kernel.org/r/20230309092434.443550-1-s-vadapalli@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/phy')
-rw-r--r--drivers/phy/ti/phy-j721e-wiz.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c
index d59918457799..d91923799df2 100644
--- a/drivers/phy/ti/phy-j721e-wiz.c
+++ b/drivers/phy/ti/phy-j721e-wiz.c
@@ -1234,6 +1234,8 @@ static int wiz_phy_fullrt_div(struct wiz *wiz, int lane)
if (wiz->lane_phy_type[lane] == PHY_TYPE_PCIE)
return regmap_field_write(wiz->p0_fullrt_div[lane], 0x1);
break;
+
+ case J721E_WIZ_16G:
case J721E_WIZ_10G:
case J7200_WIZ_10G:
case J721S2_WIZ_10G: