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authorHans de Goede <hdegoede@redhat.com>2020-03-24 11:23:35 -0700
committerDmitry Torokhov <dmitry.torokhov@gmail.com>2020-03-24 15:07:16 -0700
commit67abd9eeb458f3d4f2bbc250e9d4d796fa18f26c (patch)
tree2e5a5c4d341fbf733f42fb134f6cbfd82c6bfc03 /drivers/input
parenta7d4b171660cadd0b410be132759267731da11bb (diff)
Input: goodix - add support for getting IRQ + reset GPIOs on Bay Trail devices
On most Bay Trail (x86, UEFI + ACPI) devices the ACPI tables do not have a _DSD with a "daffd814-6eba-4d8c-8a91-bc9bbf4aa301" UUID, adding "irq-gpios" and "reset-gpios" mappings, so we cannot get the GPIOS by name without first manually adding mappings ourselves. These devices contain 2 GpioIo resource in their _CRS table, on all 4 such devices which I have access to, the order of the 2 GPIOs is reset, int. Note that the GPIO to which the touchscreen controller irq pin is connected is configured in direct-irq mode on these Bay Trail devices, the pinctrl-baytrail.c driver still allows controlling the pin as a GPIO in this case, but this is not necessarily the case on other X86 ACPI platforms, nor do we have a guarantee that the GPIO order is the same elsewhere, so we limit the use of a _CRS table with 2 GpioIo resources to Bay Trail devices only. BugLink: https://bugzilla.redhat.com/show_bug.cgi?id=1786317 BugLink: https://github.com/nexus511/gpd-ubuntu-packages/issues/10 BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=199207 Reviewed-by: Bastien Nocera <hadess@hadess.net> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20200307121505.3707-5-hdegoede@redhat.com Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Diffstat (limited to 'drivers/input')
-rw-r--r--drivers/input/touchscreen/goodix.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/drivers/input/touchscreen/goodix.c b/drivers/input/touchscreen/goodix.c
index f7af5409f31c..37862f7dfde3 100644
--- a/drivers/input/touchscreen/goodix.c
+++ b/drivers/input/touchscreen/goodix.c
@@ -626,6 +626,21 @@ static int goodix_reset(struct goodix_ts_data *ts)
}
#if defined CONFIG_X86 && defined CONFIG_ACPI
+#include <asm/cpu_device_id.h>
+#include <asm/intel-family.h>
+
+static const struct x86_cpu_id baytrail_cpu_ids[] = {
+ { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT, X86_FEATURE_ANY, },
+ {}
+};
+
+static inline bool is_byt(void)
+{
+ const struct x86_cpu_id *id = x86_match_cpu(baytrail_cpu_ids);
+
+ return !!id;
+}
+
static const struct acpi_gpio_params first_gpio = { 0, 0, false };
static const struct acpi_gpio_params second_gpio = { 1, 0, false };
@@ -698,6 +713,10 @@ static int goodix_add_acpi_gpio_mappings(struct goodix_ts_data *ts)
} else if (ts->gpio_count == 2 && ts->gpio_int_idx == 1) {
ts->irq_pin_access_method = IRQ_PIN_ACCESS_ACPI_GPIO;
gpio_mapping = acpi_goodix_int_last_gpios;
+ } else if (is_byt() && ts->gpio_count == 2 && ts->gpio_int_idx == -1) {
+ dev_info(dev, "No ACPI GpioInt resource, assuming that the GPIO order is reset, int\n");
+ ts->irq_pin_access_method = IRQ_PIN_ACCESS_ACPI_GPIO;
+ gpio_mapping = acpi_goodix_int_last_gpios;
} else {
dev_warn(dev, "Unexpected ACPI resources: gpio_count %d, gpio_int_idx %d\n",
ts->gpio_count, ts->gpio_int_idx);