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authorAharon Landau <aharonl@nvidia.com>2022-07-26 10:19:08 +0300
committerJason Gunthorpe <jgg@nvidia.com>2022-07-27 14:45:48 -0300
commit86457a92df1bebdcd8e20afa286427e4b525aa08 (patch)
treee9ba1f9ea7fe6385d947d98e8ccd6954d8ad035e /drivers/infiniband/hw/mlx5/mlx5_ib.h
parent17ae355926ed1832449d52748334b8fa799301f1 (diff)
RDMA/mlx5: Replace cache list with Xarray
The Xarray allows us to store the cached mkeys in memory efficient way. Entries are reserved in the Xarray using xa_cmpxchg before calling to the upcoming callbacks to avoid allocations in interrupt context. The xa_cmpxchg can sleep when using GFP_KERNEL, so we call it in a loop to ensure one reserved entry for each process trying to reserve. Link: https://lore.kernel.org/r/20220726071911.122765-3-michaelgur@nvidia.com Signed-off-by: Aharon Landau <aharonl@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Diffstat (limited to 'drivers/infiniband/hw/mlx5/mlx5_ib.h')
-rw-r--r--drivers/infiniband/hw/mlx5/mlx5_ib.h14
1 files changed, 4 insertions, 10 deletions
diff --git a/drivers/infiniband/hw/mlx5/mlx5_ib.h b/drivers/infiniband/hw/mlx5/mlx5_ib.h
index 42bc58967b1f..e0eb666aefa1 100644
--- a/drivers/infiniband/hw/mlx5/mlx5_ib.h
+++ b/drivers/infiniband/hw/mlx5/mlx5_ib.h
@@ -651,8 +651,6 @@ struct mlx5_ib_mr {
struct {
u32 out[MLX5_ST_SZ_DW(create_mkey_out)];
struct mlx5_async_work cb_work;
- /* Cache list element */
- struct list_head list;
};
/* Used only by kernel MRs (umem == NULL) */
@@ -744,7 +742,8 @@ struct umr_common {
struct mlx5_cache_ent {
struct xarray mkeys;
- struct list_head head;
+ unsigned long stored;
+ unsigned long reserved;
char name[4];
u32 order;
@@ -756,18 +755,13 @@ struct mlx5_cache_ent {
u8 fill_to_high_water:1;
/*
- * - available_mrs is the length of list head, ie the number of MRs
- * available for immediate allocation.
- * - total_mrs is available_mrs plus all in use MRs that could be
+ * - total_mrs is stored mkeys plus all in use MRs that could be
* returned to the cache.
- * - limit is the low water mark for available_mrs, 2* limit is the
+ * - limit is the low water mark for stored mkeys, 2* limit is the
* upper water mark.
- * - pending is the number of MRs currently being created
*/
u32 total_mrs;
- u32 available_mrs;
u32 limit;
- u32 pending;
/* Statistics */
u32 miss;