diff options
author | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2017-11-13 01:34:14 +0100 |
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committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2017-11-13 01:34:14 +0100 |
commit | 622ade3a2ff0fc4c026f116ea6018eddaeb49925 (patch) | |
tree | 44d62d3929632a0f1a802decc6b1f1f680ce658f /drivers/idle/intel_idle.c | |
parent | 4762573b934cced83b91950f0e7a9f160e3983e3 (diff) | |
parent | a4c447533a18ee86e07232d6344ba12b1f9c5077 (diff) |
Merge branch 'pm-cpuidle'
* pm-cpuidle:
intel_idle: Graceful probe failure when MWAIT is disabled
cpuidle: Avoid assignment in if () argument
cpuidle: Clean up cpuidle_enable_device() error handling a bit
cpuidle: ladder: Add per CPU PM QoS resume latency support
ARM: cpuidle: Refactor rollback operations if init fails
ARM: cpuidle: Correct driver unregistration if init fails
intel_idle: replace conditionals with static_cpu_has(X86_FEATURE_ARAT)
cpuidle: fix broadcast control when broadcast can not be entered
Conflicts:
drivers/idle/intel_idle.c
Diffstat (limited to 'drivers/idle/intel_idle.c')
-rw-r--r-- | drivers/idle/intel_idle.c | 23 |
1 files changed, 17 insertions, 6 deletions
diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c index f0b06b14e782..b2ccce5fb071 100644 --- a/drivers/idle/intel_idle.c +++ b/drivers/idle/intel_idle.c @@ -913,10 +913,9 @@ static __cpuidle int intel_idle(struct cpuidle_device *dev, struct cpuidle_state *state = &drv->states[index]; unsigned long eax = flg2MWAIT(state->flags); unsigned int cstate; + bool uninitialized_var(tick); int cpu = smp_processor_id(); - cstate = (((eax) >> MWAIT_SUBSTATE_SIZE) & MWAIT_CSTATE_MASK) + 1; - /* * leave_mm() to avoid costly and often unnecessary wakeups * for flushing the user TLB's associated with the active mm. @@ -924,12 +923,19 @@ static __cpuidle int intel_idle(struct cpuidle_device *dev, if (state->flags & CPUIDLE_FLAG_TLB_FLUSHED) leave_mm(cpu); - if (!(lapic_timer_reliable_states & (1 << (cstate)))) - tick_broadcast_enter(); + if (!static_cpu_has(X86_FEATURE_ARAT)) { + cstate = (((eax) >> MWAIT_SUBSTATE_SIZE) & + MWAIT_CSTATE_MASK) + 1; + tick = false; + if (!(lapic_timer_reliable_states & (1 << (cstate)))) { + tick = true; + tick_broadcast_enter(); + } + } mwait_idle_with_hints(eax, ecx); - if (!(lapic_timer_reliable_states & (1 << (cstate)))) + if (!static_cpu_has(X86_FEATURE_ARAT) && tick) tick_broadcast_exit(); return index; @@ -1061,7 +1067,7 @@ static const struct idle_cpu idle_cpu_dnv = { }; #define ICPU(model, cpu) \ - { X86_VENDOR_INTEL, 6, model, X86_FEATURE_MWAIT, (unsigned long)&cpu } + { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, (unsigned long)&cpu } static const struct x86_cpu_id intel_idle_ids[] __initconst = { ICPU(INTEL_FAM6_NEHALEM_EP, idle_cpu_nehalem), @@ -1125,6 +1131,11 @@ static int __init intel_idle_probe(void) return -ENODEV; } + if (!boot_cpu_has(X86_FEATURE_MWAIT)) { + pr_debug("Please enable MWAIT in BIOS SETUP\n"); + return -ENODEV; + } + if (boot_cpu_data.cpuid_level < CPUID_MWAIT_LEAF) return -ENODEV; |