summaryrefslogtreecommitdiff
path: root/drivers/i2c/busses/i2c-rcar.c
diff options
context:
space:
mode:
authorWolfram Sang <wsa+renesas@sang-engineering.com>2019-03-05 18:54:34 +0100
committerWolfram Sang <wsa@the-dreams.de>2019-03-20 18:19:20 +0100
commit94e290b0e9a6c360a5660c480c1ba996d892c650 (patch)
tree1ff7679fe1443456850550fda357ad0f14c7fadb /drivers/i2c/busses/i2c-rcar.c
parent03f85e380f9237da436ab050a4ff0f8b541c8ee7 (diff)
i2c: rcar: wait for data empty before starting DMA
When sending with DMA, the driver transfers the first byte with PIO (as documented). However, it started DMA right after the first byte was written. This worked, but was not according to the datasheet which suggests to wait until data register was empty again. Implement this. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'drivers/i2c/busses/i2c-rcar.c')
-rw-r--r--drivers/i2c/busses/i2c-rcar.c11
1 files changed, 4 insertions, 7 deletions
diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
index b0d85f5957d4..d39a4606f72d 100644
--- a/drivers/i2c/busses/i2c-rcar.c
+++ b/drivers/i2c/busses/i2c-rcar.c
@@ -480,6 +480,10 @@ static void rcar_i2c_irq_send(struct rcar_i2c_priv *priv, u32 msr)
if (!(msr & MDE))
return;
+ /* Check if DMA can be enabled and take over */
+ if (priv->pos == 1 && rcar_i2c_dma(priv))
+ return;
+
if (priv->pos < msg->len) {
/*
* Prepare next data to ICRXTX register.
@@ -490,13 +494,6 @@ static void rcar_i2c_irq_send(struct rcar_i2c_priv *priv, u32 msr)
*/
rcar_i2c_write(priv, ICRXTX, msg->buf[priv->pos]);
priv->pos++;
-
- /*
- * Try to use DMA to transmit the rest of the data if
- * address transfer phase just finished.
- */
- if (msr & MAT)
- rcar_i2c_dma(priv);
} else {
/*
* The last data was pushed to ICRXTX on _PREV_ empty irq.