summaryrefslogtreecommitdiff
path: root/drivers/gpu/host1x
diff options
context:
space:
mode:
authorSowjanya Komatineni <skomatineni@nvidia.com>2020-07-14 21:20:53 -0700
committerThierry Reding <treding@nvidia.com>2020-07-17 16:06:14 +0200
commitb3f1b760710f2acfc04abefc09358c26a75e7e89 (patch)
tree7e15c2de1f2ef281f1e7bd1d72cbb3f9afe332f7 /drivers/gpu/host1x
parent7d1409826d95216782b514f102889ed6e71abc04 (diff)
gpu: host1x: mipi: Split tegra_mipi_calibrate() and tegra_mipi_wait()
SW can trigger MIPI pads calibration any time after power on but calibration results will be latched and applied to the pads by MIPI CAL unit only when the link is in LP-11 state and then status register will be updated. For CSI, trigger of pads calibration happen during CSI stream enable where CSI receiver is kept ready prior to sensor or CSI transmitter stream start. So, pads may not be in LP-11 at this time and waiting for the calibration to be done immediate after calibration start will result in timeout. This patch splits tegra_mipi_calibrate() and tegra_mipi_wait() so triggering for calibration and waiting for it to complete can happen at different stages. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/host1x')
-rw-r--r--drivers/gpu/host1x/mipi.c17
1 files changed, 13 insertions, 4 deletions
diff --git a/drivers/gpu/host1x/mipi.c b/drivers/gpu/host1x/mipi.c
index 259e70c47a38..e606464aa43c 100644
--- a/drivers/gpu/host1x/mipi.c
+++ b/drivers/gpu/host1x/mipi.c
@@ -293,18 +293,29 @@ int tegra_mipi_disable(struct tegra_mipi_device *dev)
}
EXPORT_SYMBOL(tegra_mipi_disable);
-static int tegra_mipi_wait(struct tegra_mipi *mipi)
+int tegra_mipi_wait(struct tegra_mipi_device *device)
{
+ struct tegra_mipi *mipi = device->mipi;
void __iomem *status_reg = mipi->regs + (MIPI_CAL_STATUS << 2);
u32 value;
int err;
+ err = clk_enable(device->mipi->clk);
+ if (err < 0)
+ return err;
+
+ mutex_lock(&device->mipi->lock);
+
err = readl_relaxed_poll_timeout(status_reg, value,
!(value & MIPI_CAL_STATUS_ACTIVE) &&
(value & MIPI_CAL_STATUS_DONE), 50,
250000);
+ mutex_unlock(&device->mipi->lock);
+ clk_disable(device->mipi->clk);
+
return err;
}
+EXPORT_SYMBOL(tegra_mipi_wait);
int tegra_mipi_calibrate(struct tegra_mipi_device *device)
{
@@ -370,12 +381,10 @@ int tegra_mipi_calibrate(struct tegra_mipi_device *device)
value |= MIPI_CAL_CTRL_START;
tegra_mipi_writel(device->mipi, value, MIPI_CAL_CTRL);
- err = tegra_mipi_wait(device->mipi);
-
mutex_unlock(&device->mipi->lock);
clk_disable(device->mipi->clk);
- return err;
+ return 0;
}
EXPORT_SYMBOL(tegra_mipi_calibrate);