diff options
| author | Dillon Varone <dillon.varone@amd.com> | 2024-02-28 21:05:21 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2024-03-20 13:38:14 -0400 |
| commit | 22194e71ea8928c3a9a02ba88a21749b88d6dd8c (patch) | |
| tree | b4c387247bbe109e6e9174c88e3757394a6e8bd5 /drivers/gpu/drm/amd/display/dc/resource | |
| parent | 5b53390e4bceb584c50b1c738d666d6b18cad8c4 (diff) | |
drm/amd/display: Program pixclk according to dcn revision
[WHY&HOW]
Pixel clock programming should be built per dcn revision, not hardcoded to use
dcn20.
Reviewed-by: Chris Park <chris.park@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Dillon Varone <dillon.varone@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/resource')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c index a2387cea1af9..d521fc65afe3 100644 --- a/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c +++ b/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c @@ -1282,8 +1282,13 @@ void dcn20_build_pipe_pix_clk_params(struct pipe_ctx *pipe_ctx) static enum dc_status build_pipe_hw_param(struct pipe_ctx *pipe_ctx) { + struct resource_pool *pool = pipe_ctx->stream->ctx->dc->res_pool; - dcn20_build_pipe_pix_clk_params(pipe_ctx); + if (pool->funcs->build_pipe_pix_clk_params) { + pool->funcs->build_pipe_pix_clk_params(pipe_ctx); + } else { + dcn20_build_pipe_pix_clk_params(pipe_ctx); + } pipe_ctx->stream->clamping.pixel_encoding = pipe_ctx->stream->timing.pixel_encoding; |