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authorDmitry Osipenko <digetx@gmail.com>2019-05-02 02:38:02 +0300
committerMyungJoo Ham <myungjoo.ham@samsung.com>2019-08-24 20:11:12 +0900
commited2a8dd22a752af60282af38a47d26b227f772a7 (patch)
tree8c01f28d3b64fd47546ed883684e688bca8ae391 /drivers/devfreq
parentefe9043db49649c1f6c21df8a3860689c2035911 (diff)
PM / devfreq: tegra: Replace write memory barrier with the read barrier
The write memory barrier isn't needed because the BUS buffer is flushed by read after write that happens after the removed wmb(), we will also use readl() instead of the relaxed version to ensure that read is indeed completed. Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Diffstat (limited to 'drivers/devfreq')
-rw-r--r--drivers/devfreq/tegra-devfreq.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/devfreq/tegra-devfreq.c b/drivers/devfreq/tegra-devfreq.c
index 9d9bfef1465d..986f3dfbcab9 100644
--- a/drivers/devfreq/tegra-devfreq.c
+++ b/drivers/devfreq/tegra-devfreq.c
@@ -231,8 +231,7 @@ static void tegra_devfreq_update_wmark(struct tegra_devfreq *tegra,
static void actmon_write_barrier(struct tegra_devfreq *tegra)
{
/* ensure the update has reached the ACTMON */
- wmb();
- actmon_readl(tegra, ACTMON_GLB_STATUS);
+ readl(tegra->regs + ACTMON_GLB_STATUS);
}
static void actmon_isr_device(struct tegra_devfreq *tegra,