diff options
| author | Matt Evans <mev@rivosinc.com> | 2023-02-01 19:49:42 +0000 |
|---|---|---|
| committer | Daniel Lezcano <daniel.lezcano@linaro.org> | 2023-02-13 13:10:17 +0100 |
| commit | 225b9596cb0227c1c1b1e4a836dad43595c3e61a (patch) | |
| tree | b1d67493daa4f2f1db2fadae83f997daf2e4d74e /drivers/clocksource | |
| parent | f3af3dc7cc351bd22742eac992c72c76749ce8c3 (diff) | |
clocksource/drivers/riscv: Patch riscv_clock_next_event() jump before first use
A static key is used to select between SBI and Sstc timer usage in
riscv_clock_next_event(), but currently the direction is resolved
after cpuhp_setup_state() is called (which sets the next event). The
first event will therefore fall through the sbi_set_timer() path; this
breaks Sstc-only systems. So, apply the jump patching before first
use.
Fixes: 9f7a8ff6391f ("RISC-V: Prefer sstc extension if available")
Signed-off-by: Matt Evans <mev@rivosinc.com>
Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/CDDAB2D0-264E-42F3-8E31-BA210BEB8EC1@rivosinc.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Diffstat (limited to 'drivers/clocksource')
| -rw-r--r-- | drivers/clocksource/timer-riscv.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c index d8cb629d3aab..5f0f10c7e222 100644 --- a/drivers/clocksource/timer-riscv.c +++ b/drivers/clocksource/timer-riscv.c @@ -192,6 +192,11 @@ static int __init riscv_timer_init_dt(struct device_node *n) return error; } + if (riscv_isa_extension_available(NULL, SSTC)) { + pr_info("Timer interrupt in S-mode is available via sstc extension\n"); + static_branch_enable(&riscv_sstc_available); + } + error = cpuhp_setup_state(CPUHP_AP_RISCV_TIMER_STARTING, "clockevents/riscv/timer:starting", riscv_timer_starting_cpu, riscv_timer_dying_cpu); @@ -199,11 +204,6 @@ static int __init riscv_timer_init_dt(struct device_node *n) pr_err("cpu hp setup state failed for RISCV timer [%d]\n", error); - if (riscv_isa_extension_available(NULL, SSTC)) { - pr_info("Timer interrupt in S-mode is available via sstc extension\n"); - static_branch_enable(&riscv_sstc_available); - } - return error; } |