diff options
| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2024-04-25 10:03:18 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2024-04-25 10:38:19 +0200 |
| commit | d0d4585222d0e652ca33f03921d5574963d372ec (patch) | |
| tree | b2d55b49c443adac3eaca64d869e4d2d818717db /drivers/clk | |
| parent | 1b1f8cc20429e27c1199d4b2846862da8665561b (diff) | |
clk: renesas: shmobile: Remove unused CLK_ENABLE_ON_INIT
CLK_ENABLE_ON_INIT is a relic from the old SH clock framework.
It is not used on SH/R-Mobile ARM drivers.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/f01e60a1007afe9385ddc10c4665752857ba4135.1714032122.git.geert+renesas@glider.be
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/renesas/clk-r8a73a4.c | 2 | ||||
| -rw-r--r-- | drivers/clk/renesas/clk-r8a7740.c | 2 | ||||
| -rw-r--r-- | drivers/clk/renesas/clk-sh73a0.c | 2 |
3 files changed, 0 insertions, 6 deletions
diff --git a/drivers/clk/renesas/clk-r8a73a4.c b/drivers/clk/renesas/clk-r8a73a4.c index f45c2c45808b..4b1815147f77 100644 --- a/drivers/clk/renesas/clk-r8a73a4.c +++ b/drivers/clk/renesas/clk-r8a73a4.c @@ -30,8 +30,6 @@ struct r8a73a4_cpg { #define CPG_PLL2HCR 0xe4 #define CPG_PLL2SCR 0xf4 -#define CLK_ENABLE_ON_INIT BIT(0) - struct div4_clk { const char *name; unsigned int reg; diff --git a/drivers/clk/renesas/clk-r8a7740.c b/drivers/clk/renesas/clk-r8a7740.c index 325394b6e55e..22e9be7240bb 100644 --- a/drivers/clk/renesas/clk-r8a7740.c +++ b/drivers/clk/renesas/clk-r8a7740.c @@ -26,8 +26,6 @@ struct r8a7740_cpg { #define CPG_USBCKCR 0x8c #define CPG_FRQCRC 0xe0 -#define CLK_ENABLE_ON_INIT BIT(0) - struct div4_clk { const char *name; unsigned int reg; diff --git a/drivers/clk/renesas/clk-sh73a0.c b/drivers/clk/renesas/clk-sh73a0.c index 8c51090f13e1..47fc99ccd283 100644 --- a/drivers/clk/renesas/clk-sh73a0.c +++ b/drivers/clk/renesas/clk-sh73a0.c @@ -34,8 +34,6 @@ struct sh73a0_cpg { #define CPG_DSI0PHYCR 0x6c #define CPG_DSI1PHYCR 0x70 -#define CLK_ENABLE_ON_INIT BIT(0) - struct div4_clk { const char *name; const char *parent; |