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authorArnd Bergmann <arnd@arndb.de>2018-09-28 22:16:47 +0200
committerArnd Bergmann <arnd@arndb.de>2018-09-28 22:16:58 +0200
commit86e762d96713aeafac2dc582bbd38075d421c20a (patch)
treeea53fff11b286ed85afede77013d61e063670fa1 /crypto/speck.c
parentab2dc8446a9912ac11dc00374d8f27357f1c37d0 (diff)
parentfae210bb5bfbd29118e18881f7108c6bd59293b9 (diff)
Merge tag 'renesas-drivers-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
Renesas ARM Based SoC Drivers Updates for v4.20 * Convert to SPDX identifiers * R-Car V3M (r8a77970) and V3H (r8a77980): Document Timer Unit (TMU) bindings * RZ/G1N (r8a7744) and RZ/G1C (r8a77470) SoCs: - Document APMU and SMP enable method * RZ/G2M (r8a74a1), RZ/G1N (r8a7744) and RZ/G2E (r8a774c0) SoCs: - Add reset support - Add sysc support * RZ/G2M (r8a774a1), RZ/G2E (r8a774c0) and RZ/A2M (r7s9210) SoCs: - Add support for identifying SoC * RZ/A2M (r7s9210) SoC: - Add basic SoC setup support * tag 'renesas-drivers-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (21 commits) dt-bindings: apmu: Document r8a7744 support dt-bindings: timer: renesas: tmu: document R8A779{7|8}0 bindings dt-bindings: apmu: Document r8a77470 support soc: renesas: rcar-rst: Add support for RZ/G1N dt-bindings: reset: rcar-rst: Document r8a7744 reset module soc: renesas: rcar-sysc: Add r8a7744 support dt-bindings: power: rcar-sysc: Add r8a7744 power domain index macros dt-bindings: power: rcar-sysc: Document r8a7744 SYSC binding soc: renesas: rcar-rst: Add support for RZ/G2E dt-bindings: reset: rcar-rst: Document r8a774c0 rst soc: renesas: rcar-sysc: Add r8a774c0 support dt-bindings: power: rcar-sysc: Document r8a774c0 sysc dt-bindings: power: Add r8a774c0 SYSC power domain definitions soc: renesas: Identify RZ/G2E soc: renesas: convert to SPDX identifiers soc: renesas: rcar-rst: Add support for RZ/G2M soc: renesas: rcar-sysc: Add r8a774a1 support dt-bindings: power: Add r8a774a1 SYSC power domain definitions soc: renesas: identify RZ/A2 ARM: shmobile: Add basic RZ/A2 SoC support ... Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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