diff options
| author | Lucas Stach <l.stach@pengutronix.de> | 2015-08-19 15:19:47 +0200 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2015-09-17 08:54:13 +0800 |
| commit | e1ffceb078c6bc8a674077b29aee0926bbb54131 (patch) | |
| tree | 416ad6306764b56319512fd50394f2afa81ef331 /arch | |
| parent | 34adba711750b1a0eee100dda1d7fb6cfc55608f (diff) | |
ARM: imx53: qsrb: fix PMIC interrupt level
The MC34708 PMIC interrupt level is active high, but was set to
active low in the devicetree, probably as a result of a copy and
paste error from the QSB board.
This caused IRQ storms and led to the kernel disabling the PMIC
interrupt.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/imx53-qsrb.dts | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx53-qsrb.dts b/arch/arm/boot/dts/imx53-qsrb.dts index 66e47de5e826..96d7eede412e 100644 --- a/arch/arm/boot/dts/imx53-qsrb.dts +++ b/arch/arm/boot/dts/imx53-qsrb.dts @@ -36,7 +36,7 @@ pinctrl-0 = <&pinctrl_pmic>; reg = <0x08>; interrupt-parent = <&gpio5>; - interrupts = <23 0x8>; + interrupts = <23 IRQ_TYPE_LEVEL_HIGH>; regulators { sw1_reg: sw1a { regulator-name = "SW1"; |