diff options
author | Will Deacon <will@kernel.org> | 2021-07-30 12:24:37 +0100 |
---|---|---|
committer | Peter Zijlstra <peterz@infradead.org> | 2021-08-20 12:33:06 +0200 |
commit | d82158fa6df4237c9859b27d719c53b4fe09e69e (patch) | |
tree | b11ef96f5a4c1e73d11a523d46309361332ad1b8 /arch | |
parent | c94d89fafa49ba70fedbb01cb52dfbbdd7dc0986 (diff) |
arm64: Implement task_cpu_possible_mask()
Provide an implementation of task_cpu_possible_mask() so that we can
prevent 64-bit-only cores being added to the 'cpus_mask' for compat
tasks on systems with mismatched 32-bit support at EL0,
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20210730112443.23245-11-will@kernel.org
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm64/include/asm/mmu_context.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h index eeb210997149..f4ba93d4ffeb 100644 --- a/arch/arm64/include/asm/mmu_context.h +++ b/arch/arm64/include/asm/mmu_context.h @@ -231,6 +231,19 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next, update_saved_ttbr0(tsk, next); } +static inline const struct cpumask * +task_cpu_possible_mask(struct task_struct *p) +{ + if (!static_branch_unlikely(&arm64_mismatched_32bit_el0)) + return cpu_possible_mask; + + if (!is_compat_thread(task_thread_info(p))) + return cpu_possible_mask; + + return system_32bit_el0_cpumask(); +} +#define task_cpu_possible_mask task_cpu_possible_mask + void verify_cpu_asid_bits(void); void post_ttbr_update_workaround(void); |