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authorRadu Pirea <radu.pirea@microchip.com>2017-12-19 17:17:59 +0200
committerMark Brown <broonie@kernel.org>2018-01-05 12:42:09 +0000
commita9889ed62d06ec76f41492ebdc6cc6538e761e3e (patch)
tree5357fff9e7ec62c63165946b4fcfb951ac8ca778 /arch
parent66e900a3d225575c8b48b59ae1fe74bb6e5a65cc (diff)
spi: atmel: Implements transfers with bounce buffer
This patch enables SPI DMA transfers for Atmel SAM9 SoCs and implements a bounce buffer for transfers which have vmalloc allocated buffers. Those buffers are not cache coherent even if they have been transformed into sg lists. UBIFS is affected by this cache coherency issue. In this patch I also reverted "spi: atmel: fix corrupted data issue on SAM9 family SoCs"(7094576ccdc3acfe1e06a1e2ab547add375baf7f). Signed-off-by: Radu Pirea <radu.pirea@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'arch')
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