diff options
| author | Simon Arlott <simon@fire.lp0.eu> | 2007-05-11 20:42:34 +0100 |
|---|---|---|
| committer | Kyle McMartin <kyle@athena.road.mcmartin.ca> | 2007-05-22 22:52:16 -0400 |
| commit | 7022672e4046fac4699aa5f8ff2a5213b7ec4ff9 (patch) | |
| tree | 2df6e94faf275ebab1ff61a211323f5b758ae909 /arch/parisc/kernel/perf.c | |
| parent | b5e8b733a18a1192666005f95f44e02440b057d4 (diff) | |
[PARISC] spelling fixes: arch/parisc/
Spelling fixes in arch/parisc/.
Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
Acked-by: Grant Grundler <grundler@parisc-linux.org>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
Diffstat (limited to 'arch/parisc/kernel/perf.c')
| -rw-r--r-- | arch/parisc/kernel/perf.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/parisc/kernel/perf.c b/arch/parisc/kernel/perf.c index 08717380e025..89d6d5ad44b5 100644 --- a/arch/parisc/kernel/perf.c +++ b/arch/parisc/kernel/perf.c @@ -171,7 +171,7 @@ static const uint64_t perf_bitmasks[] = { /* * Write control bitmasks for Pa-8700 processor given - * somethings have changed slightly. + * some things have changed slightly. */ static const uint64_t perf_bitmasks_piranha[] = { 0x0000000000000000ul, /* first dbl word must be zero */ @@ -576,27 +576,27 @@ static int perf_stop_counters(uint32_t *raddr) if (!perf_rdr_read_ubuf(16, userbuf)) return -13; - /* Counter0 is bits 1398 thru 1429 */ + /* Counter0 is bits 1398 to 1429 */ tmp64 = (userbuf[21] << 22) & 0x00000000ffc00000; tmp64 |= (userbuf[22] >> 42) & 0x00000000003fffff; /* OR sticky0 (bit 1430) to counter0 bit 32 */ tmp64 |= (userbuf[22] >> 10) & 0x0000000080000000; raddr[0] = (uint32_t)tmp64; - /* Counter1 is bits 1431 thru 1462 */ + /* Counter1 is bits 1431 to 1462 */ tmp64 = (userbuf[22] >> 9) & 0x00000000ffffffff; /* OR sticky1 (bit 1463) to counter1 bit 32 */ tmp64 |= (userbuf[22] << 23) & 0x0000000080000000; raddr[1] = (uint32_t)tmp64; - /* Counter2 is bits 1464 thru 1495 */ + /* Counter2 is bits 1464 to 1495 */ tmp64 = (userbuf[22] << 24) & 0x00000000ff000000; tmp64 |= (userbuf[23] >> 40) & 0x0000000000ffffff; /* OR sticky2 (bit 1496) to counter2 bit 32 */ tmp64 |= (userbuf[23] >> 8) & 0x0000000080000000; raddr[2] = (uint32_t)tmp64; - /* Counter3 is bits 1497 thru 1528 */ + /* Counter3 is bits 1497 to 1528 */ tmp64 = (userbuf[23] >> 7) & 0x00000000ffffffff; /* OR sticky3 (bit 1529) to counter3 bit 32 */ tmp64 |= (userbuf[23] << 25) & 0x0000000080000000; @@ -618,7 +618,7 @@ static int perf_stop_counters(uint32_t *raddr) userbuf[23] = 0; /* - * Write back the zero'ed bytes + the image given + * Write back the zeroed bytes + the image given * the read was destructive. */ perf_rdr_write(16, userbuf); |