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authorMarc Zyngier <marc.zyngier@arm.com>2019-04-09 16:22:24 +0100
committerWill Deacon <will@kernel.org>2019-10-08 12:25:25 +0100
commit9405447ef79bc93101373e130f72e9e6cbf17dbb (patch)
tree32b2849bdfb5da0850e377da453de5c3b50476ff /arch/arm64/include/asm/cpucaps.h
parent93916beb70143c46bf1d2bacf814be3a124b253b (diff)
arm64: Avoid Cavium TX2 erratum 219 when switching TTBR
As a PRFM instruction racing against a TTBR update can have undesirable effects on TX2, NOP-out such PRFM on cores that are affected by the TX2-219 erratum. Cc: <stable@vger.kernel.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'arch/arm64/include/asm/cpucaps.h')
-rw-r--r--arch/arm64/include/asm/cpucaps.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/cpucaps.h b/arch/arm64/include/asm/cpucaps.h
index e81e0cbd728f..ac1dbca3d0cd 100644
--- a/arch/arm64/include/asm/cpucaps.h
+++ b/arch/arm64/include/asm/cpucaps.h
@@ -53,7 +53,8 @@
#define ARM64_HAS_DCPODP 43
#define ARM64_WORKAROUND_1463225 44
#define ARM64_WORKAROUND_CAVIUM_TX2_219_TVM 45
+#define ARM64_WORKAROUND_CAVIUM_TX2_219_PRFM 46
-#define ARM64_NCAPS 46
+#define ARM64_NCAPS 47
#endif /* __ASM_CPUCAPS_H */