diff options
author | Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> | 2023-05-22 16:59:52 +0200 |
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committer | Michal Simek <michal.simek@amd.com> | 2023-06-05 13:15:11 +0200 |
commit | f1d48a128a2a016cda9049355cd5db35a9644012 (patch) | |
tree | f8d12318eb8467ff00f1d375d7eadcd38001a955 /arch/arm64/boot/dts/xilinx | |
parent | 1d831cade71883d0578e9f41d19d09b67f8263ac (diff) |
arm64: zynqmp: Add pmu interrupt-affinity
Based on dt-binding "This property should present when there is more than a
single SPI" that's also case that's why explicitly specify interrupt
affinity to avoid incorrect usage.
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/dde2e4b5ac6018adb9bfae05bb3800af6b7c0f0e.1684767562.git.michal.simek@amd.com
Diffstat (limited to 'arch/arm64/boot/dts/xilinx')
-rw-r--r-- | arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index a961bb6f31ff..02cfcc716936 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -155,6 +155,10 @@ <0 144 4>, <0 145 4>, <0 146 4>; + interrupt-affinity = <&cpu0>, + <&cpu1>, + <&cpu2>, + <&cpu3>; }; psci { |