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authorWolfram Sang <wsa+renesas@sang-engineering.com>2021-11-10 20:15:57 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2021-11-19 10:45:24 +0100
commit52e844ee9a6f460e6160736a43ef13317a91ca74 (patch)
tree4ba6df536f38b77dd9dad55f88a669090dd8b0a9 /arch/arm64/boot/dts/renesas/r8a77990.dtsi
parentf9a2adcc9e908907129c18518d4ea6195c44bf00 (diff)
arm64: dts: reneas: rzg2: Add SDnH clocks
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20211110191610.5664-9-wsa+renesas@sang-engineering.com Link: https://lore.kernel.org/r/20211110191610.5664-10-wsa+renesas@sang-engineering.com Link: https://lore.kernel.org/r/20211110191610.5664-11-wsa+renesas@sang-engineering.com Link: https://lore.kernel.org/r/20211110191610.5664-12-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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