diff options
author | Andre Przywara <andre.przywara@arm.com> | 2020-05-13 11:30:07 +0100 |
---|---|---|
committer | Sudeep Holla <sudeep.holla@arm.com> | 2020-05-17 18:57:10 +0100 |
commit | fac959c93f971f9b6bbc7bad12369cec8c760bd9 (patch) | |
tree | 7b781e96b3ccdcb57bb5256e6219e55297f77e04 /arch/arm64/boot/dts/arm | |
parent | 78631aecc52c4b2adcf611769df2ff9c67ac16d0 (diff) |
arm64: dts: fvp: Fix ITS node names and #msi-cells
The GIC ITS nodes in the fastmodel DTS files were not fully binding
compliant.
Use one of the allowed node names, also add the required #msi-cells
property for the older model.
Link: https://lore.kernel.org/r/20200513103016.130417-12-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Diffstat (limited to 'arch/arm64/boot/dts/arm')
-rw-r--r-- | arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi | 3 | ||||
-rw-r--r-- | arch/arm64/boot/dts/arm/fvp-base-revc.dts | 2 |
2 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi b/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi index 906f51935b36..e4a3c7dbcc20 100644 --- a/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi +++ b/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi @@ -19,9 +19,10 @@ <0x0 0x2c02f000 0x0 0x2000>; interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; - its: its@2f020000 { + its: msi-controller@2f020000 { compatible = "arm,gic-v3-its"; msi-controller; + #msi-cells = <1>; reg = <0x20000 0x20000>; }; }; diff --git a/arch/arm64/boot/dts/arm/fvp-base-revc.dts b/arch/arm64/boot/dts/arm/fvp-base-revc.dts index 66381d89c1ce..0cf96ceff431 100644 --- a/arch/arm64/boot/dts/arm/fvp-base-revc.dts +++ b/arch/arm64/boot/dts/arm/fvp-base-revc.dts @@ -126,7 +126,7 @@ <0x0 0x2c02f000 0 0x2000>; // GICV interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; - its: its@2f020000 { + its: msi-controller@2f020000 { #msi-cells = <1>; compatible = "arm,gic-v3-its"; reg = <0x0 0x2f020000 0x0 0x20000>; // GITS |