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author | Vladimir Murzin <vladimir.murzin@arm.com> | 2017-05-24 11:24:31 +0100 |
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committer | Christoph Hellwig <hch@lst.de> | 2017-06-30 10:03:10 -0700 |
commit | 1b11d39e6a6864a9dfb64e2c3ac03090e3b34399 (patch) | |
tree | 0cc05ea30843b0a613eb1e1b2d7a6078c88e815c /arch/arm/mm/cache-v7.S | |
parent | 1c51c429f30ea10428337f3a33c12059ba59f668 (diff) |
ARM: NOMMU: Set ARM_DMA_MEM_BUFFERABLE for M-class cpus
Now, we have dedicated non-cacheable region for consistent DMA
operations. However, that region can still be marked as bufferable by
MPU, so it'd be safer to have barriers by default. M-class machines
that didn't need it until now also likely won't need it in the future,
therefore, we offer this as an option.
Tested-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Tested-by: Andras Szemzo <sza@esh.hu>
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Diffstat (limited to 'arch/arm/mm/cache-v7.S')
0 files changed, 0 insertions, 0 deletions