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authorLinus Torvalds <torvalds@linux-foundation.org>2019-07-19 17:05:08 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2019-07-19 17:05:08 -0700
commit24e44913aa746098349370a0f279733c0cadcba7 (patch)
tree51edd7b13d889653b0400d67dd3e7e91a11db75b /arch/arm/mach-sa1100
parent31cc088a4f5d83481c6f5041bd6eb06115b974af (diff)
parent7e8a0f10899075ac2665c78c4e49dbaf32bf3346 (diff)
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC platform updates from Olof Johansson: "SoC platform changes. Main theme this merge window: - The Netx platform (Netx 100/500) platform is removed by Linus Walleij-- the SoC doesn't have active maintainers with hardware, and in discussions with the vendor the agreement was that it's OK to remove. - Russell King has a series of patches that cleans up and refactors SA1101 and RiscPC support" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (47 commits) ARM: stm32: use "depends on" instead of "if" after prompt ARM: sa1100: convert to common clock framework ARM: exynos: Cleanup cppcheck shifting warning ARM: pxa/lubbock: remove lubbock_set_misc_wr() from global view ARM: exynos: Only build MCPM support if used arm: add missing include platform-data/atmel.h ARM: davinci: Use GPIO lookup table for DA850 LEDs ARM: OMAP2: drop explicit assembler architecture ARM: use arch_extension directive instead of arch argument ARM: imx: Switch imx7d to imx-cpufreq-dt for speed-grading ARM: bcm: Enable PINCTRL for ARCH_BRCMSTB ARM: bcm: Enable ARCH_HAS_RESET_CONTROLLER for ARCH_BRCMSTB ARM: riscpc: enable chained scatterlist support ARM: riscpc: reduce IRQ handling code ARM: riscpc: move RiscPC assembly files from arch/arm/lib to mach-rpc ARM: riscpc: parse video information from tagged list ARM: riscpc: add ecard quirk for Atomwide 3port serial card MAINTAINERS: mvebu: Add git entry soc: ti: pm33xx: Add a print while entering RTC only mode with DDR in self-refresh ARM: OMAP2+: Make some variables static ...
Diffstat (limited to 'arch/arm/mach-sa1100')
-rw-r--r--arch/arm/mach-sa1100/assabet.c91
-rw-r--r--arch/arm/mach-sa1100/badge4.c2
-rw-r--r--arch/arm/mach-sa1100/clock.c220
-rw-r--r--arch/arm/mach-sa1100/h3xxx.c64
-rw-r--r--arch/arm/mach-sa1100/hackkit.c48
-rw-r--r--arch/arm/mach-sa1100/neponset.c109
6 files changed, 161 insertions, 373 deletions
diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c
index dd8d13fb8450..d96a101e5504 100644
--- a/arch/arm/mach-sa1100/assabet.c
+++ b/arch/arm/mach-sa1100/assabet.c
@@ -519,6 +519,29 @@ static const struct gpio_keys_platform_data assabet_keys_pdata = {
.rep = 0,
};
+static struct gpiod_lookup_table assabet_uart1_gpio_table = {
+ .dev_id = "sa11x0-uart.1",
+ .table = {
+ GPIO_LOOKUP("assabet", 16, "dtr", GPIO_ACTIVE_LOW),
+ GPIO_LOOKUP("assabet", 17, "rts", GPIO_ACTIVE_LOW),
+ GPIO_LOOKUP("assabet", 25, "dcd", GPIO_ACTIVE_LOW),
+ GPIO_LOOKUP("assabet", 26, "cts", GPIO_ACTIVE_LOW),
+ GPIO_LOOKUP("assabet", 27, "dsr", GPIO_ACTIVE_LOW),
+ { },
+ },
+};
+
+static struct gpiod_lookup_table assabet_uart3_gpio_table = {
+ .dev_id = "sa11x0-uart.3",
+ .table = {
+ GPIO_LOOKUP("assabet", 28, "cts", GPIO_ACTIVE_LOW),
+ GPIO_LOOKUP("assabet", 29, "dsr", GPIO_ACTIVE_LOW),
+ GPIO_LOOKUP("assabet", 30, "dcd", GPIO_ACTIVE_LOW),
+ GPIO_LOOKUP("assabet", 31, "rng", GPIO_ACTIVE_LOW),
+ { },
+ },
+};
+
static void __init assabet_init(void)
{
/*
@@ -565,7 +588,10 @@ static void __init assabet_init(void)
neponset_resources, ARRAY_SIZE(neponset_resources));
#endif
} else {
+ gpiod_add_lookup_table(&assabet_uart1_gpio_table);
+ gpiod_add_lookup_table(&assabet_uart3_gpio_table);
gpiod_add_lookup_table(&assabet_cf_vcc_gpio_table);
+
sa11x0_register_fixed_regulator(0, &assabet_cf_vcc_pdata,
assabet_cf_vcc_consumers,
ARRAY_SIZE(assabet_cf_vcc_consumers),
@@ -655,74 +681,13 @@ static void assabet_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
{
if (port->mapbase == _Ser1UTCR0) {
if (state)
- ASSABET_BCR_clear(ASSABET_BCR_RS232EN |
- ASSABET_BCR_COM_RTS |
- ASSABET_BCR_COM_DTR);
- else
- ASSABET_BCR_set(ASSABET_BCR_RS232EN |
- ASSABET_BCR_COM_RTS |
- ASSABET_BCR_COM_DTR);
- }
-}
-
-/*
- * Assabet uses COM_RTS and COM_DTR for both UART1 (com port)
- * and UART3 (radio module). We only handle them for UART1 here.
- */
-static void assabet_set_mctrl(struct uart_port *port, u_int mctrl)
-{
- if (port->mapbase == _Ser1UTCR0) {
- u_int set = 0, clear = 0;
-
- if (mctrl & TIOCM_RTS)
- clear |= ASSABET_BCR_COM_RTS;
+ ASSABET_BCR_clear(ASSABET_BCR_RS232EN);
else
- set |= ASSABET_BCR_COM_RTS;
-
- if (mctrl & TIOCM_DTR)
- clear |= ASSABET_BCR_COM_DTR;
- else
- set |= ASSABET_BCR_COM_DTR;
-
- ASSABET_BCR_clear(clear);
- ASSABET_BCR_set(set);
- }
-}
-
-static u_int assabet_get_mctrl(struct uart_port *port)
-{
- u_int ret = 0;
- u_int bsr = ASSABET_BSR;
-
- /* need 2 reads to read current value */
- bsr = ASSABET_BSR;
-
- if (port->mapbase == _Ser1UTCR0) {
- if (bsr & ASSABET_BSR_COM_DCD)
- ret |= TIOCM_CD;
- if (bsr & ASSABET_BSR_COM_CTS)
- ret |= TIOCM_CTS;
- if (bsr & ASSABET_BSR_COM_DSR)
- ret |= TIOCM_DSR;
- } else if (port->mapbase == _Ser3UTCR0) {
- if (bsr & ASSABET_BSR_RAD_DCD)
- ret |= TIOCM_CD;
- if (bsr & ASSABET_BSR_RAD_CTS)
- ret |= TIOCM_CTS;
- if (bsr & ASSABET_BSR_RAD_DSR)
- ret |= TIOCM_DSR;
- if (bsr & ASSABET_BSR_RAD_RI)
- ret |= TIOCM_RI;
- } else {
- ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
+ ASSABET_BCR_set(ASSABET_BCR_RS232EN);
}
-
- return ret;
}
static struct sa1100_port_fns assabet_port_fns __initdata = {
- .set_mctrl = assabet_set_mctrl,
- .get_mctrl = assabet_get_mctrl,
.pm = assabet_uart_pm,
};
diff --git a/arch/arm/mach-sa1100/badge4.c b/arch/arm/mach-sa1100/badge4.c
index bc0e0e24ecb7..de79f3502045 100644
--- a/arch/arm/mach-sa1100/badge4.c
+++ b/arch/arm/mach-sa1100/badge4.c
@@ -311,8 +311,6 @@ badge4_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
}
static struct sa1100_port_fns badge4_port_fns __initdata = {
- //.get_mctrl = badge4_get_mctrl,
- //.set_mctrl = badge4_set_mctrl,
.pm = badge4_uart_pm,
};
diff --git a/arch/arm/mach-sa1100/clock.c b/arch/arm/mach-sa1100/clock.c
index 6199e87447ca..e8691921c69a 100644
--- a/arch/arm/mach-sa1100/clock.c
+++ b/arch/arm/mach-sa1100/clock.c
@@ -2,176 +2,144 @@
/*
* linux/arch/arm/mach-sa1100/clock.c
*/
-#include <linux/module.h>
#include <linux/kernel.h>
-#include <linux/device.h>
-#include <linux/list.h>
#include <linux/errno.h>
#include <linux/err.h>
-#include <linux/string.h>
#include <linux/clk.h>
-#include <linux/spinlock.h>
-#include <linux/mutex.h>
-#include <linux/io.h>
#include <linux/clkdev.h>
+#include <linux/clk-provider.h>
+#include <linux/io.h>
+#include <linux/spinlock.h>
#include <mach/hardware.h>
#include <mach/generic.h>
-struct clkops {
- void (*enable)(struct clk *);
- void (*disable)(struct clk *);
- unsigned long (*get_rate)(struct clk *);
+static const char * const clk_tucr_parents[] = {
+ "clk32768", "clk3686400",
};
-struct clk {
- const struct clkops *ops;
- unsigned int enabled;
-};
-
-#define DEFINE_CLK(_name, _ops) \
-struct clk clk_##_name = { \
- .ops = _ops, \
- }
-
-static DEFINE_SPINLOCK(clocks_lock);
-
-/* Dummy clk routine to build generic kernel parts that may be using them */
-long clk_round_rate(struct clk *clk, unsigned long rate)
-{
- return clk_get_rate(clk);
-}
-EXPORT_SYMBOL(clk_round_rate);
-
-int clk_set_rate(struct clk *clk, unsigned long rate)
-{
- return 0;
-}
-EXPORT_SYMBOL(clk_set_rate);
-
-int clk_set_parent(struct clk *clk, struct clk *parent)
-{
- return 0;
-}
-EXPORT_SYMBOL(clk_set_parent);
+static DEFINE_SPINLOCK(tucr_lock);
-struct clk *clk_get_parent(struct clk *clk)
+static int clk_gpio27_enable(struct clk_hw *hw)
{
- return NULL;
-}
-EXPORT_SYMBOL(clk_get_parent);
+ unsigned long flags;
-static void clk_gpio27_enable(struct clk *clk)
-{
/*
* First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
* (SA-1110 Developer's Manual, section 9.1.2.1)
*/
+ local_irq_save(flags);
GAFR |= GPIO_32_768kHz;
GPDR |= GPIO_32_768kHz;
- TUCR = TUCR_3_6864MHz;
+ local_irq_restore(flags);
+
+ return 0;
}
-static void clk_gpio27_disable(struct clk *clk)
+static void clk_gpio27_disable(struct clk_hw *hw)
{
- TUCR = 0;
+ unsigned long flags;
+
+ local_irq_save(flags);
GPDR &= ~GPIO_32_768kHz;
GAFR &= ~GPIO_32_768kHz;
+ local_irq_restore(flags);
}
-static void clk_cpu_enable(struct clk *clk)
-{
-}
+static const struct clk_ops clk_gpio27_ops = {
+ .enable = clk_gpio27_enable,
+ .disable = clk_gpio27_disable,
+};
-static void clk_cpu_disable(struct clk *clk)
-{
-}
+static const char * const clk_gpio27_parents[] = {
+ "tucr-mux",
+};
-static unsigned long clk_cpu_get_rate(struct clk *clk)
+static const struct clk_init_data clk_gpio27_init_data __initconst = {
+ .name = "gpio27",
+ .ops = &clk_gpio27_ops,
+ .parent_names = clk_gpio27_parents,
+ .num_parents = ARRAY_SIZE(clk_gpio27_parents),
+};
+
+/*
+ * Derived from the table 8-1 in the SA1110 manual, the MPLL appears to
+ * multiply its input rate by 4 x (4 + PPCR). This calculation gives
+ * the exact rate. The figures given in the table are the rates rounded
+ * to 100kHz. Stick with sa11x0_getspeed() for the time being.
+ */
+static unsigned long clk_mpll_recalc_rate(struct clk_hw *hw,
+ unsigned long prate)
{
return sa11x0_getspeed(0) * 1000;
}
-int clk_enable(struct clk *clk)
-{
- unsigned long flags;
-
- if (clk) {
- spin_lock_irqsave(&clocks_lock, flags);
- if (clk->enabled++ == 0)
- clk->ops->enable(clk);
- spin_unlock_irqrestore(&clocks_lock, flags);
- }
-
- return 0;
-}
-EXPORT_SYMBOL(clk_enable);
+static const struct clk_ops clk_mpll_ops = {
+ .recalc_rate = clk_mpll_recalc_rate,
+};
-void clk_disable(struct clk *clk)
-{
- unsigned long flags;
+static const char * const clk_mpll_parents[] = {
+ "clk3686400",
+};
- if (clk) {
- WARN_ON(clk->enabled == 0);
- spin_lock_irqsave(&clocks_lock, flags);
- if (--clk->enabled == 0)
- clk->ops->disable(clk);
- spin_unlock_irqrestore(&clocks_lock, flags);
- }
-}
-EXPORT_SYMBOL(clk_disable);
+static const struct clk_init_data clk_mpll_init_data __initconst = {
+ .name = "mpll",
+ .ops = &clk_mpll_ops,
+ .parent_names = clk_mpll_parents,
+ .num_parents = ARRAY_SIZE(clk_mpll_parents),
+ .flags = CLK_GET_RATE_NOCACHE | CLK_IS_CRITICAL,
+};
-unsigned long clk_get_rate(struct clk *clk)
+int __init sa11xx_clk_init(void)
{
- if (clk && clk->ops && clk->ops->get_rate)
- return clk->ops->get_rate(clk);
-
- return 0;
-}
-EXPORT_SYMBOL(clk_get_rate);
+ struct clk_hw *hw;
+ int ret;
-const struct clkops clk_gpio27_ops = {
- .enable = clk_gpio27_enable,
- .disable = clk_gpio27_disable,
-};
+ hw = clk_hw_register_fixed_rate(NULL, "clk32768", NULL, 0, 32768);
+ if (IS_ERR(hw))
+ return PTR_ERR(hw);
-const struct clkops clk_cpu_ops = {
- .enable = clk_cpu_enable,
- .disable = clk_cpu_disable,
- .get_rate = clk_cpu_get_rate,
-};
+ clk_hw_register_clkdev(hw, NULL, "sa1100-rtc");
-static DEFINE_CLK(gpio27, &clk_gpio27_ops);
+ hw = clk_hw_register_fixed_rate(NULL, "clk3686400", NULL, 0, 3686400);
+ if (IS_ERR(hw))
+ return PTR_ERR(hw);
-static DEFINE_CLK(cpu, &clk_cpu_ops);
+ clk_hw_register_clkdev(hw, "OSTIMER0", NULL);
-static unsigned long clk_36864_get_rate(struct clk *clk)
-{
- return 3686400;
-}
+ hw = kzalloc(sizeof(*hw), GFP_KERNEL);
+ if (!hw)
+ return -ENOMEM;
+ hw->init = &clk_mpll_init_data;
+ ret = clk_hw_register(NULL, hw);
+ if (ret) {
+ kfree(hw);
+ return ret;
+ }
-static struct clkops clk_36864_ops = {
- .enable = clk_cpu_enable,
- .disable = clk_cpu_disable,
- .get_rate = clk_36864_get_rate,
-};
+ clk_hw_register_clkdev(hw, NULL, "sa11x0-fb");
+ clk_hw_register_clkdev(hw, NULL, "sa11x0-pcmcia");
+ clk_hw_register_clkdev(hw, NULL, "sa11x0-pcmcia.0");
+ clk_hw_register_clkdev(hw, NULL, "sa11x0-pcmcia.1");
+ clk_hw_register_clkdev(hw, NULL, "1800");
+
+ hw = clk_hw_register_mux(NULL, "tucr-mux", clk_tucr_parents,
+ ARRAY_SIZE(clk_tucr_parents), 0,
+ (void __iomem *)&TUCR, FShft(TUCR_TSEL),
+ FAlnMsk(TUCR_TSEL), 0, &tucr_lock);
+ clk_set_rate(hw->clk, 3686400);
+
+ hw = kzalloc(sizeof(*hw), GFP_KERNEL);
+ if (!hw)
+ return -ENOMEM;
+ hw->init = &clk_gpio27_init_data;
+ ret = clk_hw_register(NULL, hw);
+ if (ret) {
+ kfree(hw);
+ return ret;
+ }
-static DEFINE_CLK(36864, &clk_36864_ops);
-
-static struct clk_lookup sa11xx_clkregs[] = {
- CLKDEV_INIT("sa1111.0", NULL, &clk_gpio27),
- CLKDEV_INIT("sa1100-rtc", NULL, NULL),
- CLKDEV_INIT("sa11x0-fb", NULL, &clk_cpu),
- CLKDEV_INIT("sa11x0-pcmcia", NULL, &clk_cpu),
- CLKDEV_INIT("sa11x0-pcmcia.0", NULL, &clk_cpu),
- CLKDEV_INIT("sa11x0-pcmcia.1", NULL, &clk_cpu),
- /* sa1111 names devices using internal offsets, PCMCIA is at 0x1800 */
- CLKDEV_INIT("1800", NULL, &clk_cpu),
- CLKDEV_INIT(NULL, "OSTIMER0", &clk_36864),
-};
+ clk_hw_register_clkdev(hw, NULL, "sa1111.0");
-int __init sa11xx_clk_init(void)
-{
- clkdev_add_table(sa11xx_clkregs, ARRAY_SIZE(sa11xx_clkregs));
return 0;
}
diff --git a/arch/arm/mach-sa1100/h3xxx.c b/arch/arm/mach-sa1100/h3xxx.c
index e93e3a1d60d5..d685f03f51f3 100644
--- a/arch/arm/mach-sa1100/h3xxx.c
+++ b/arch/arm/mach-sa1100/h3xxx.c
@@ -83,57 +83,6 @@ static struct resource h3xxx_flash_resource =
/*
* H3xxx uart support
*/
-static struct gpio h3xxx_uart_gpio[] = {
- { H3XXX_GPIO_COM_DCD, GPIOF_IN, "COM DCD" },
- { H3XXX_GPIO_COM_CTS, GPIOF_IN, "COM CTS" },
- { H3XXX_GPIO_COM_RTS, GPIOF_OUT_INIT_LOW, "COM RTS" },
-};
-
-static bool h3xxx_uart_request_gpios(void)
-{
- static bool h3xxx_uart_gpio_ok;
- int rc;
-
- if (h3xxx_uart_gpio_ok)
- return true;
-
- rc = gpio_request_array(h3xxx_uart_gpio, ARRAY_SIZE(h3xxx_uart_gpio));
- if (rc)
- pr_err("h3xxx_uart_request_gpios: error %d\n", rc);
- else
- h3xxx_uart_gpio_ok = true;
-
- return h3xxx_uart_gpio_ok;
-}
-
-static void h3xxx_uart_set_mctrl(struct uart_port *port, u_int mctrl)
-{
- if (port->mapbase == _Ser3UTCR0) {
- if (!h3xxx_uart_request_gpios())
- return;
- gpio_set_value(H3XXX_GPIO_COM_RTS, !(mctrl & TIOCM_RTS));
- }
-}
-
-static u_int h3xxx_uart_get_mctrl(struct uart_port *port)
-{
- u_int ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
-
- if (port->mapbase == _Ser3UTCR0) {
- if (!h3xxx_uart_request_gpios())
- return ret;
- /*
- * DCD and CTS bits are inverted in GPLR by RS232 transceiver
- */
- if (gpio_get_value(H3XXX_GPIO_COM_DCD))
- ret &= ~TIOCM_CD;
- if (gpio_get_value(H3XXX_GPIO_COM_CTS))
- ret &= ~TIOCM_CTS;
- }
-
- return ret;
-}
-
static void h3xxx_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
{
if (port->mapbase == _Ser3UTCR0) {
@@ -166,12 +115,20 @@ static int h3xxx_uart_set_wake(struct uart_port *port, u_int enable)
}
static struct sa1100_port_fns h3xxx_port_fns __initdata = {
- .set_mctrl = h3xxx_uart_set_mctrl,
- .get_mctrl = h3xxx_uart_get_mctrl,
.pm = h3xxx_uart_pm,
.set_wake = h3xxx_uart_set_wake,
};
+static struct gpiod_lookup_table h3xxx_uart3_gpio_table = {
+ .dev_id = "sa11x0-uart.3",
+ .table = {
+ GPIO_LOOKUP("gpio", H3XXX_GPIO_COM_DCD, "dcd", GPIO_ACTIVE_LOW),
+ GPIO_LOOKUP("gpio", H3XXX_GPIO_COM_CTS, "cts", GPIO_ACTIVE_LOW),
+ GPIO_LOOKUP("gpio", H3XXX_GPIO_COM_RTS, "rts", GPIO_ACTIVE_LOW),
+ { },
+ },
+};
+
/*
* EGPIO
*/
@@ -279,6 +236,7 @@ static struct gpiod_lookup_table h3xxx_pcmcia_gpio_table = {
void __init h3xxx_mach_init(void)
{
gpiod_add_lookup_table(&h3xxx_pcmcia_gpio_table);
+ gpiod_add_lookup_table(&h3xxx_uart3_gpio_table);
sa1100_register_uart_fns(&h3xxx_port_fns);
sa11x0_register_mtd(&h3xxx_flash_data, &h3xxx_flash_resource, 1);
platform_add_devices(h3xxx_devices, ARRAY_SIZE(h3xxx_devices));
diff --git a/arch/arm/mach-sa1100/hackkit.c b/arch/arm/mach-sa1100/hackkit.c
index 4f4c1bb890e0..6d37d263e0d2 100644
--- a/arch/arm/mach-sa1100/hackkit.c
+++ b/arch/arm/mach-sa1100/hackkit.c
@@ -45,8 +45,6 @@
/* init funcs */
static void __init hackkit_map_io(void);
-static u_int hackkit_get_mctrl(struct uart_port *port);
-static void hackkit_set_mctrl(struct uart_port *port, u_int mctrl);
static void hackkit_uart_pm(struct uart_port *port, u_int state, u_int oldstate);
/**********************************************************************
@@ -67,8 +65,6 @@ static struct map_desc hackkit_io_desc[] __initdata = {
};
static struct sa1100_port_fns hackkit_port_fns __initdata = {
- .set_mctrl = hackkit_set_mctrl,
- .get_mctrl = hackkit_get_mctrl,
.pm = hackkit_uart_pm,
};
@@ -101,50 +97,6 @@ static void hackkit_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
/* TODO: switch on/off uart in powersave mode */
}
-/*
- * Note! this can be called from IRQ context.
- * FIXME: No modem ctrl lines yet.
- */
-static void hackkit_set_mctrl(struct uart_port *port, u_int mctrl)
-{
-#if 0
- if (port->mapbase == _Ser1UTCR0) {
- u_int set = 0, clear = 0;
-
- if (mctrl & TIOCM_RTS)
- set |= PT_CTRL2_RS1_RTS;
- else
- clear |= PT_CTRL2_RS1_RTS;
-
- if (mctrl & TIOCM_DTR)
- set |= PT_CTRL2_RS1_DTR;
- else
- clear |= PT_CTRL2_RS1_DTR;
-
- PTCTRL2_clear(clear);
- PTCTRL2_set(set);
- }
-#endif
-}
-
-static u_int hackkit_get_mctrl(struct uart_port *port)
-{
- u_int ret = 0;
-#if 0
- u_int irqsr = PT_IRQSR;
-
- /* need 2 reads to read current value */
- irqsr = PT_IRQSR;
-
- /* TODO: check IRQ source register for modem/com
- status lines and set them correctly. */
-#endif
-
- ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
-
- return ret;
-}
-
static struct mtd_partition hackkit_partitions[] = {
{
.name = "BLOB",
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c
index a671e4c994cf..6876bc1e33b4 100644
--- a/arch/arm/mach-sa1100/neponset.c
+++ b/arch/arm/mach-sa1100/neponset.c
@@ -11,7 +11,6 @@
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/module.h>
-#include <linux/platform_data/sa11x0-serial.h>
#include <linux/platform_device.h>
#include <linux/pm.h>
#include <linux/serial_core.h>
@@ -49,23 +48,8 @@
#define IRR_SA1111 (1 << 2)
#define NCR_NGPIO 7
-
-#define MDM_CTL0_RTS1 (1 << 0)
-#define MDM_CTL0_DTR1 (1 << 1)
-#define MDM_CTL0_RTS2 (1 << 2)
-#define MDM_CTL0_DTR2 (1 << 3)
#define MDM_CTL0_NGPIO 4
-
-#define MDM_CTL1_CTS1 (1 << 0)
-#define MDM_CTL1_DSR1 (1 << 1)
-#define MDM_CTL1_DCD1 (1 << 2)
-#define MDM_CTL1_CTS2 (1 << 3)
-#define MDM_CTL1_DSR2 (1 << 4)
-#define MDM_CTL1_DCD2 (1 << 5)
#define MDM_CTL1_NGPIO 6
-
-#define AUD_SEL_1341 (1 << 0)
-#define AUD_MUTE_1341 (1 << 1)
#define AUD_NGPIO 2
extern void sa1110_mb_disable(void);
@@ -97,6 +81,30 @@ struct neponset_drvdata {
struct gpio_chip *gpio[4];
};
+static struct gpiod_lookup_table neponset_uart1_gpio_table = {
+ .dev_id = "sa11x0-uart.1",
+ .table = {
+ GPIO_LOOKUP("neponset-mdm-ctl0", 2, "rts", GPIO_ACTIVE_LOW),
+ GPIO_LOOKUP("neponset-mdm-ctl0", 3, "dtr", GPIO_ACTIVE_LOW),
+ GPIO_LOOKUP("neponset-mdm-ctl1", 3, "cts", GPIO_ACTIVE_LOW),
+ GPIO_LOOKUP("neponset-mdm-ctl1", 4, "dsr", GPIO_ACTIVE_LOW),
+ GPIO_LOOKUP("neponset-mdm-ctl1", 5, "dcd", GPIO_ACTIVE_LOW),
+ { },
+ },
+};
+
+static struct gpiod_lookup_table neponset_uart3_gpio_table = {
+ .dev_id = "sa11x0-uart.3",
+ .table = {
+ GPIO_LOOKUP("neponset-mdm-ctl0", 0, "rts", GPIO_ACTIVE_LOW),
+ GPIO_LOOKUP("neponset-mdm-ctl0", 1, "dtr", GPIO_ACTIVE_LOW),
+ GPIO_LOOKUP("neponset-mdm-ctl1", 0, "cts", GPIO_ACTIVE_LOW),
+ GPIO_LOOKUP("neponset-mdm-ctl1", 1, "dsr", GPIO_ACTIVE_LOW),
+ GPIO_LOOKUP("neponset-mdm-ctl1", 2, "dcd", GPIO_ACTIVE_LOW),
+ { },
+ },
+};
+
static struct gpiod_lookup_table neponset_pcmcia_table = {
.dev_id = "1800",
.table = {
@@ -124,69 +132,6 @@ void neponset_ncr_frob(unsigned int mask, unsigned int val)
}
EXPORT_SYMBOL(neponset_ncr_frob);
-static void neponset_set_mctrl(struct uart_port *port, u_int mctrl)
-{
- struct neponset_drvdata *n = nep;
- unsigned long mask, val = 0;
-
- if (!n)
- return;
-
- if (port->mapbase == _Ser1UTCR0) {
- mask = MDM_CTL0_RTS2 | MDM_CTL0_DTR2;
-
- if (!(mctrl & TIOCM_RTS))
- val |= MDM_CTL0_RTS2;
-
- if (!(mctrl & TIOCM_DTR))
- val |= MDM_CTL0_DTR2;
- } else if (port->mapbase == _Ser3UTCR0) {
- mask = MDM_CTL0_RTS1 | MDM_CTL0_DTR1;
-
- if (!(mctrl & TIOCM_RTS))
- val |= MDM_CTL0_RTS1;
-
- if (!(mctrl & TIOCM_DTR))
- val |= MDM_CTL0_DTR1;
- }
-
- n->gpio[1]->set_multiple(n->gpio[1], &mask, &val);
-}
-
-static u_int neponset_get_mctrl(struct uart_port *port)
-{
- void __iomem *base = nep->base;
- u_int ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
- u_int mdm_ctl1;
-
- if (!base)
- return ret;
-
- mdm_ctl1 = readb_relaxed(base + MDM_CTL_1);
- if (port->mapbase == _Ser1UTCR0) {
- if (mdm_ctl1 & MDM_CTL1_DCD2)
- ret &= ~TIOCM_CD;
- if (mdm_ctl1 & MDM_CTL1_CTS2)
- ret &= ~TIOCM_CTS;
- if (mdm_ctl1 & MDM_CTL1_DSR2)
- ret &= ~TIOCM_DSR;
- } else if (port->mapbase == _Ser3UTCR0) {
- if (mdm_ctl1 & MDM_CTL1_DCD1)
- ret &= ~TIOCM_CD;
- if (mdm_ctl1 & MDM_CTL1_CTS1)
- ret &= ~TIOCM_CTS;
- if (mdm_ctl1 & MDM_CTL1_DSR1)
- ret &= ~TIOCM_DSR;
- }
-
- return ret;
-}
-
-static struct sa1100_port_fns neponset_port_fns = {
- .set_mctrl = neponset_set_mctrl,
- .get_mctrl = neponset_get_mctrl,
-};
-
/*
* Install handler for Neponset IRQ. Note that we have to loop here
* since the ETHERNET and USAR IRQs are level based, and we need to
@@ -388,6 +333,8 @@ static int neponset_probe(struct platform_device *dev)
d->base + AUD_CTL, AUD_NGPIO, false,
neponset_aud_names);
+ gpiod_add_lookup_table(&neponset_uart1_gpio_table);
+ gpiod_add_lookup_table(&neponset_uart3_gpio_table);
gpiod_add_lookup_table(&neponset_pcmcia_table);
/*
@@ -402,8 +349,6 @@ static int neponset_probe(struct platform_device *dev)
d->irq_base, d->irq_base + NEP_IRQ_NR - 1);
nep = d;
- sa1100_register_uart_fns(&neponset_port_fns);
-
/* Ensure that the memory bus request/grant signals are setup */
sa1110_mb_disable();
@@ -442,6 +387,8 @@ static int neponset_remove(struct platform_device *dev)
platform_device_unregister(d->smc91x);
gpiod_remove_lookup_table(&neponset_pcmcia_table);
+ gpiod_remove_lookup_table(&neponset_uart3_gpio_table);
+ gpiod_remove_lookup_table(&neponset_uart1_gpio_table);
irq_set_chained_handler(irq, NULL);
irq_free_descs(d->irq_base, NEP_IRQ_NR);