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authorFlorian Fainelli <florian.fainelli@broadcom.com>2024-01-29 10:46:51 -0800
committerFlorian Fainelli <florian.fainelli@broadcom.com>2024-02-01 13:51:35 -0800
commit3992d06c79897a5fdb5abeb26150c115edd46e97 (patch)
treeca9940e735828c90d59eee8d2f15d1b36c089ce9 /arch/arm/include
parent6613476e225e090cc9aad49be7fa504e290dd33d (diff)
ARM: brcmstb: Add debug UART entry for 74165
BCM74165 uses the same address map as the 7278 family (v7 memory map) therefore re-use that constant and shift down the other labels to keep numerical ordering. Link: https://lore.kernel.org/r/20240129184651.2405485-1-florian.fainelli@broadcom.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/debug/brcmstb.S8
1 files changed, 5 insertions, 3 deletions
diff --git a/arch/arm/include/debug/brcmstb.S b/arch/arm/include/debug/brcmstb.S
index f6175e6e28cd..3f7d68740ed4 100644
--- a/arch/arm/include/debug/brcmstb.S
+++ b/arch/arm/include/debug/brcmstb.S
@@ -27,6 +27,7 @@
#define UARTA_72165 UARTA_7278
#define UARTA_7364 REG_PHYS_ADDR(0x40b000)
#define UARTA_7366 UARTA_7364
+#define UARTA_74165 UARTA_7278
#define UARTA_74371 REG_PHYS_ADDR(0x406b00)
#define UARTA_7439 REG_PHYS_ADDR(0x40a900)
#define UARTA_7445 REG_PHYS_ADDR(0x40ab00)
@@ -88,9 +89,10 @@ ARM_BE8( rev \rv, \rv )
30: checkuart(\rp, \rv, 0x72780000, 7278)
31: checkuart(\rp, \rv, 0x73640000, 7364)
32: checkuart(\rp, \rv, 0x73660000, 7366)
-33: checkuart(\rp, \rv, 0x07437100, 74371)
-34: checkuart(\rp, \rv, 0x74390000, 7439)
-35: checkuart(\rp, \rv, 0x74450000, 7445)
+33: checkuart(\rp, \rv, 0x07416500, 74165)
+34: checkuart(\rp, \rv, 0x07437100, 74371)
+35: checkuart(\rp, \rv, 0x74390000, 7439)
+36: checkuart(\rp, \rv, 0x74450000, 7445)
/* No valid UART found */
90: mov \rp, #0