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authorMaxime Chevallier <maxime.chevallier@bootlin.com>2023-06-01 16:14:51 +0200
committerDavid S. Miller <davem@davemloft.net>2023-06-05 09:56:36 +0100
commit642af0f92cbe01c4b05eb38a0fe94867a3798b34 (patch)
tree02476954314f58e1eb89f23151df3876d6fb4cd2 /MAINTAINERS
parentf69de8aa4752adae750892c71711a5b806ec0dff (diff)
net: mdio: Introduce a regmap-based mdio driver
There exists several examples today of devices that embed an ethernet PHY or PCS directly inside an SoC. In this situation, either the device is controlled through a vendor-specific register set, or sometimes exposes the standard 802.3 registers that are typically accessed over MDIO. As phylib and phylink are designed to use mdiodevices, this driver allows creating a virtual MDIO bus, that translates mdiodev register accesses to regmap accesses. The reason we use regmap is because there are at least 3 such devices known today, 2 of them are Altera TSE PCS's, memory-mapped, exposed with a 4-byte stride in stmmac's dwmac-socfpga variant, and a 2-byte stride in altera-tse. The other one (nxp,sja1110-base-tx-mdio) is exposed over SPI. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Reviewed-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'MAINTAINERS')
-rw-r--r--MAINTAINERS7
1 files changed, 7 insertions, 0 deletions
diff --git a/MAINTAINERS b/MAINTAINERS
index 288d9a5edb9d..5a2ba8567be6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -12844,6 +12844,13 @@ F: Documentation/devicetree/bindings/net/ieee802154/mcr20a.txt
F: drivers/net/ieee802154/mcr20a.c
F: drivers/net/ieee802154/mcr20a.h
+MDIO REGMAP DRIVER
+M: Maxime Chevallier <maxime.chevallier@bootlin.com>
+L: netdev@vger.kernel.org
+S: Maintained
+F: drivers/net/mdio/mdio-regmap.c
+F: include/linux/mdio/mdio-regmap.h
+
MEASUREMENT COMPUTING CIO-DAC IIO DRIVER
M: William Breathitt Gray <william.gray@linaro.org>
L: linux-iio@vger.kernel.org