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authorRodrigo Vivi <rodrigo.vivi@intel.com>2023-09-26 13:55:54 -0400
committerRodrigo Vivi <rodrigo.vivi@intel.com>2023-10-02 12:22:44 -0400
commit587e80dc1cb5f1f3f41b38356d3e3563c01d9d8e (patch)
tree836086fa738a7321debcf3b78e4904fb849a320d /Documentation/gpu
parentd38d753da7f7c9c4739e3e9ca3c986fa2c1b8c98 (diff)
drm/i915: Add missing GSCCS documentation
Introduce the basic documentation about GSC CS. This "GPU Basics" section is focused on explaining the hardware rather than the driver/uapi, so let's make sure GSC is also properly documented here. v2: Fixes from Matt: typos and acronym. Fixes: 5fd974d164b4 ("drm/i915/mtl: add initial definitions for GSC CS") Suggested-by: Matt Roper <matthew.d.roper@intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230926175554.25968-1-rodrigo.vivi@intel.com
Diffstat (limited to 'Documentation/gpu')
-rw-r--r--Documentation/gpu/i915.rst4
1 files changed, 4 insertions, 0 deletions
diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst
index 13de8bcaaa29..0ca1550fd9dc 100644
--- a/Documentation/gpu/i915.rst
+++ b/Documentation/gpu/i915.rst
@@ -279,6 +279,10 @@ An Intel GPU has multiple engines. There are several engine types:
Also sometimes called 'VEBOX' in hardware documentation.
- Compute Command Streamer (CCS). An engine that has access to the media and
GPGPU pipelines, but not the 3D pipeline.
+- Graphics Security Controller (GSCCS). A dedicated engine for internal
+ communication with GSC controller on security related tasks like
+ High-bandwidth Digital Content Protection (HDCP), Protected Xe Path (PXP),
+ and HuC firmware authentication.
The Intel GPU family is a family of integrated GPU's using Unified
Memory Access. For having the GPU "do work", user space will feed the