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authorAndrew Jeffery <andrew@aj.id.au>2020-12-08 11:56:15 +1030
committerJoel Stanley <joel@jms.id.au>2021-02-09 22:27:19 +1030
commitd2dc55b96f876616838b61b2378656effd0e14ba (patch)
tree63b0bb94f4b8701329db505a0a05a9bbb85b28ea
parentd050d049f8b8077025292c1ecf456c4ee7f96861 (diff)
ARM: dts: aspeed: rainier: Add eMMC clock phase compensation
Determined by scope measurements at speed. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20201208012615.2717412-7-andrew@aj.id.au Signed-off-by: Joel Stanley <joel@jms.id.au>
-rw-r--r--arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
index a4b77aec5424..72de21f7c941 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
@@ -195,6 +195,7 @@
&emmc {
status = "okay";
+ clk-phase-mmc-hs200 = <180>, <180>;
};
&fsim0 {