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authorAmit Cohen <amcohen@nvidia.com>2022-07-24 11:03:29 +0300
committerDavid S. Miller <davem@davemloft.net>2022-07-25 13:58:56 +0100
commita168e13f84488611f5b9453fab45649ac2d560ee (patch)
treeeb381dbc90ec83644e75dd02144d1976886e22c3
parent4017d929649271541b1c7955fbf48fbe9296f46f (diff)
mlxsw: spectrum_ptp: Rename mlxsw_sp1_ptp_phc_adjfreq()
The function mlxsw_sp_ptp_phc_adjfreq() configures MTUTC register to adjust hardware frequency by a given value. This configuration will be same for Spectrum-2. In preparation for Spectrum-2 PTP support, rename the function to not be Spectrum-1 specific. Later, it will be used for Spectrum-2 also. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c
index 4df97ddbf5b9..5116d7ebe258 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c
@@ -122,7 +122,7 @@ static u64 mlxsw_sp1_ptp_read_frc(const struct cyclecounter *cc)
}
static int
-mlxsw_sp1_ptp_phc_adjfreq(struct mlxsw_sp_ptp_clock *clock, int freq_adj)
+mlxsw_sp_ptp_phc_adjfreq(struct mlxsw_sp_ptp_clock *clock, int freq_adj)
{
struct mlxsw_core *mlxsw_core = clock->core;
char mtutc_pl[MLXSW_REG_MTUTC_LEN];
@@ -194,7 +194,7 @@ static int mlxsw_sp1_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
clock->nominal_c_mult + diff;
spin_unlock_bh(&clock->lock);
- return mlxsw_sp1_ptp_phc_adjfreq(&clock->common, neg_adj ? -ppb : ppb);
+ return mlxsw_sp_ptp_phc_adjfreq(&clock->common, neg_adj ? -ppb : ppb);
}
static int mlxsw_sp1_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)