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authorBhaskar Chowdhury <unixbhaskar@gmail.com>2021-02-13 16:00:14 +0100
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>2021-03-11 11:59:42 +0100
commit911edeff2264bc307f242c3aab8331ef5800295a (patch)
tree94a172d8dcd0af0461b2df0efc95a041a6a21678
parent18490a1ad8ea624820c2b86d05edc9b7bd456e9b (diff)
media: drivers/media/pci/cx18: Fix a spelling minimze to minimize in the file cx18-firmware.c
s/minimze/minimize/ Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
-rw-r--r--drivers/media/pci/cx18/cx18-firmware.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/media/pci/cx18/cx18-firmware.c b/drivers/media/pci/cx18/cx18-firmware.c
index 876b96c11290..fdac310d7477 100644
--- a/drivers/media/pci/cx18/cx18-firmware.c
+++ b/drivers/media/pci/cx18/cx18-firmware.c
@@ -244,7 +244,7 @@ void cx18_init_power(struct cx18 *cx, int lowpwr)
* an error of less than 0.13 ppm which is way, way better than any off
* the shelf crystal will have for accuracy anyway.
*
- * Below I aim to run the PLLs' VCOs near 400 MHz to minimze errors.
+ * Below I aim to run the PLLs' VCOs near 400 MHz to minimize errors.
*
* Many thanks to Jeff Campbell and Mike Bradley for their extensive
* investigation, experimentation, testing, and suggested solutions of