diff options
| author | Ping-Ke Shih <pkshih@realtek.com> | 2024-01-03 15:01:55 +0800 |
|---|---|---|
| committer | Kalle Valo <kvalo@kernel.org> | 2024-01-10 16:52:17 +0200 |
| commit | 8d101b15f86dae41fcf1afe448d5a52c1956c465 (patch) | |
| tree | 6048123cbd71e2494e72d9f9c773f402117089cb | |
| parent | 6aeaa379291bac24be568808da5e305d975d8860 (diff) | |
wifi: rtw88: 8822ce: refine power parameters for RFE type 5
Refine the power parameters for better step response especially at high
current ramp case that is caused by power inductor variation.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://msgid.link/20240103070155.119488-1-pkshih@realtek.com
| -rw-r--r-- | drivers/net/wireless/realtek/rtw88/pci.c | 4 | ||||
| -rw-r--r-- | drivers/net/wireless/realtek/rtw88/reg.h | 3 |
2 files changed, 7 insertions, 0 deletions
diff --git a/drivers/net/wireless/realtek/rtw88/pci.c b/drivers/net/wireless/realtek/rtw88/pci.c index 2bfc0e822b8d..9986a4cb37eb 100644 --- a/drivers/net/wireless/realtek/rtw88/pci.c +++ b/drivers/net/wireless/realtek/rtw88/pci.c @@ -1450,6 +1450,7 @@ static void rtw_pci_phy_cfg(struct rtw_dev *rtwdev) { struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; const struct rtw_chip_info *chip = rtwdev->chip; + struct rtw_efuse *efuse = &rtwdev->efuse; struct pci_dev *pdev = rtwpci->pdev; const struct rtw_intf_phy_para *para; u16 cut; @@ -1498,6 +1499,9 @@ static void rtw_pci_phy_cfg(struct rtw_dev *rtwdev) rtw_err(rtwdev, "failed to set PCI cap, ret = %d\n", ret); } + + if (chip->id == RTW_CHIP_TYPE_8822C && efuse->rfe_option == 5) + rtw_write32_mask(rtwdev, REG_ANAPARSW_MAC_0, BIT_CF_L_V2, 0x1); } static int __maybe_unused rtw_pci_suspend(struct device *dev) diff --git a/drivers/net/wireless/realtek/rtw88/reg.h b/drivers/net/wireless/realtek/rtw88/reg.h index 1634f03784f1..b122f226924b 100644 --- a/drivers/net/wireless/realtek/rtw88/reg.h +++ b/drivers/net/wireless/realtek/rtw88/reg.h @@ -557,6 +557,9 @@ #define REG_RFE_INV16 0x0cbe #define BIT_RFE_BUF_EN BIT(3) +#define REG_ANAPARSW_MAC_0 0x1010 +#define BIT_CF_L_V2 GENMASK(29, 28) + #define REG_ANAPAR_XTAL_0 0x1040 #define BIT_XCAP_0 GENMASK(23, 10) #define REG_CPU_DMEM_CON 0x1080 |