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authorDan Carpenter <dan.carpenter@oracle.com>2020-09-08 10:25:57 +0300
committerChanwoo Choi <cw00.choi@samsung.com>2020-09-23 13:35:58 +0900
commit6bf560766a8ef5afe4faa3244220cf5b3a934549 (patch)
treefda649c0baaa9b089dfa51f873fd1459abdd1ec9
parent0c309ed17c50e7eeaf3c66102b475198064e80da (diff)
PM / devfreq: tegra30: Disable clock on error in probe
This error path needs to call clk_disable_unprepare(). Fixes: 7296443b900e ("PM / devfreq: tegra30: Handle possible round-rate error") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
-rw-r--r--drivers/devfreq/tegra30-devfreq.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/devfreq/tegra30-devfreq.c b/drivers/devfreq/tegra30-devfreq.c
index e94a27804c20..dedd39de7367 100644
--- a/drivers/devfreq/tegra30-devfreq.c
+++ b/drivers/devfreq/tegra30-devfreq.c
@@ -836,7 +836,8 @@ static int tegra_devfreq_probe(struct platform_device *pdev)
rate = clk_round_rate(tegra->emc_clock, ULONG_MAX);
if (rate < 0) {
dev_err(&pdev->dev, "Failed to round clock rate: %ld\n", rate);
- return rate;
+ err = rate;
+ goto disable_clk;
}
tegra->max_freq = rate / KHZ;
@@ -897,6 +898,7 @@ remove_opps:
dev_pm_opp_remove_all_dynamic(&pdev->dev);
reset_control_reset(tegra->reset);
+disable_clk:
clk_disable_unprepare(tegra->clock);
return err;