diff options
author | Philippe Begnic <philippe.begnic@st.com> | 2013-05-27 14:41:31 +0200 |
---|---|---|
committer | Mike Turquette <mturquette@linaro.org> | 2013-06-06 18:17:16 -0700 |
commit | 54e300339cce6d4be665e6bbd736123dd0f15888 (patch) | |
tree | c3b59f5ae060ab1a5b20fa99f9d594f9c46c5ffd | |
parent | 852bbba96773777efc2b932f2c5939c6fbf252da (diff) |
mfd: db8500: Update BML clock register for db8580
BML clock register address in DB8580 has changed.Defined a new address
under different name for DB8580.
Signed-off-by: Philippe Begnic <philippe.begnic@st.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
-rw-r--r-- | drivers/mfd/db8500-prcmu.c | 1 | ||||
-rw-r--r-- | drivers/mfd/dbx500-prcmu-regs.h | 1 | ||||
-rw-r--r-- | include/linux/mfd/dbx500-prcmu.h | 1 |
3 files changed, 3 insertions, 0 deletions
diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c index 66f80973596b..a292a1deff9a 100644 --- a/drivers/mfd/db8500-prcmu.c +++ b/drivers/mfd/db8500-prcmu.c @@ -480,6 +480,7 @@ struct clk_mgt clk_mgt[PRCMU_NUM_REG_CLOCKS] = { CLK_MGT_ENTRY(PER6CLK, PLL_DIV, true), CLK_MGT_ENTRY(PER7CLK, PLL_DIV, true), CLK_MGT_ENTRY(LCDCLK, PLL_FIX, true), + CLK_MGT_ENTRY(BML8580CLK, PLL_DIV, true), CLK_MGT_ENTRY(BMLCLK, PLL_DIV, true), CLK_MGT_ENTRY(HSITXCLK, PLL_DIV, true), CLK_MGT_ENTRY(HSIRXCLK, PLL_DIV, true), diff --git a/drivers/mfd/dbx500-prcmu-regs.h b/drivers/mfd/dbx500-prcmu-regs.h index d14836ed2114..ca355dd423a6 100644 --- a/drivers/mfd/dbx500-prcmu-regs.h +++ b/drivers/mfd/dbx500-prcmu-regs.h @@ -32,6 +32,7 @@ #define PRCM_PER7CLK_MGT (0x040) #define PRCM_LCDCLK_MGT (0x044) #define PRCM_BMLCLK_MGT (0x04C) +#define PRCM_BML8580CLK_MGT (0x108) #define PRCM_HSITXCLK_MGT (0x050) #define PRCM_HSIRXCLK_MGT (0x054) #define PRCM_HDMICLK_MGT (0x058) diff --git a/include/linux/mfd/dbx500-prcmu.h b/include/linux/mfd/dbx500-prcmu.h index d0ba355cc55f..ca0790fba2f5 100644 --- a/include/linux/mfd/dbx500-prcmu.h +++ b/include/linux/mfd/dbx500-prcmu.h @@ -138,6 +138,7 @@ enum prcmu_clock { PRCMU_G1CLK, /* Ux540 only */ PRCMU_SDMMCHCLK, PRCMU_CAMCLK, + PRCMU_BML8580CLK, PRCMU_NUM_REG_CLOCKS, PRCMU_SYSCLK = PRCMU_NUM_REG_CLOCKS, PRCMU_CDCLK, |