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authorAndrew Cooper <andrew.cooper3@citrix.com>2024-05-29 19:36:05 +0100
committerBorislav Petkov (AMD) <bp@alien8.de>2024-06-29 16:10:37 +0200
commit34b3fc558b537bdf99644dcde539e151716f6331 (patch)
treed9ce242ec6789bb4d7090cb05ede7fe40ed4f660
parent78ce84b9e0a54a0c91a7449f321c1f852c0cd3fc (diff)
x86/cpu/intel: Drop stray FAM6 check with new Intel CPU model defines
The outer if () should have been dropped when switching to c->x86_vfm. Fixes: 6568fc18c2f6 ("x86/cpu/intel: Switch to new Intel CPU model defines") Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Acked-by: Tony Luck <tony.luck@intel.com> Link: https://lore.kernel.org/r/20240529183605.17520-1-andrew.cooper3@citrix.com
-rw-r--r--arch/x86/kernel/cpu/intel.c18
1 files changed, 7 insertions, 11 deletions
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index a813089ca408..a9ea0dba6f0c 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -294,17 +294,13 @@ static void early_init_intel(struct cpuinfo_x86 *c)
}
/* Penwell and Cloverview have the TSC which doesn't sleep on S3 */
- if (c->x86 == 6) {
- switch (c->x86_vfm) {
- case INTEL_ATOM_SALTWELL_MID:
- case INTEL_ATOM_SALTWELL_TABLET:
- case INTEL_ATOM_SILVERMONT_MID:
- case INTEL_ATOM_AIRMONT_NP:
- set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC_S3);
- break;
- default:
- break;
- }
+ switch (c->x86_vfm) {
+ case INTEL_ATOM_SALTWELL_MID:
+ case INTEL_ATOM_SALTWELL_TABLET:
+ case INTEL_ATOM_SILVERMONT_MID:
+ case INTEL_ATOM_AIRMONT_NP:
+ set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC_S3);
+ break;
}
/*