From e87d17ca6af5ba4466538de87785cfc8c20af59a Mon Sep 17 00:00:00 2001 From: Kishon Vijay Abraham I Date: Fri, 6 Nov 2020 20:41:07 +0530 Subject: PCI: cadence: Do not error if "cdns,max-outbound-regions" is not found Now that "cdns,max-outbound-regions" is made an optional property, do not error out if "cdns,max-outbound-regions" device tree property is not found. Link: http://lore.kernel.org/r/20201105165331.GA55814@bogus Link: https://lore.kernel.org/r/20201106151107.3987-3-kishon@ti.com Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Lorenzo Pieralisi Reviewed-by: Rob Herring --- drivers/pci/controller/cadence/pcie-cadence-ep.c | 9 +++------ drivers/pci/controller/cadence/pcie-cadence.h | 1 + 2 files changed, 4 insertions(+), 6 deletions(-) (limited to 'drivers/pci') diff --git a/drivers/pci/controller/cadence/pcie-cadence-ep.c b/drivers/pci/controller/cadence/pcie-cadence-ep.c index 84cc58dc8512..9e2b024d32f2 100644 --- a/drivers/pci/controller/cadence/pcie-cadence-ep.c +++ b/drivers/pci/controller/cadence/pcie-cadence-ep.c @@ -530,12 +530,9 @@ int cdns_pcie_ep_setup(struct cdns_pcie_ep *ep) } pcie->mem_res = res; - ret = of_property_read_u32(np, "cdns,max-outbound-regions", - &ep->max_regions); - if (ret < 0) { - dev_err(dev, "missing \"cdns,max-outbound-regions\"\n"); - return ret; - } + ep->max_regions = CDNS_PCIE_MAX_OB; + of_property_read_u32(np, "cdns,max-outbound-regions", &ep->max_regions); + ep->ob_addr = devm_kcalloc(dev, ep->max_regions, sizeof(*ep->ob_addr), GFP_KERNEL); diff --git a/drivers/pci/controller/cadence/pcie-cadence.h b/drivers/pci/controller/cadence/pcie-cadence.h index feed1e3038f4..30eba6cafe2c 100644 --- a/drivers/pci/controller/cadence/pcie-cadence.h +++ b/drivers/pci/controller/cadence/pcie-cadence.h @@ -197,6 +197,7 @@ enum cdns_pcie_rp_bar { }; #define CDNS_PCIE_RP_MAX_IB 0x3 +#define CDNS_PCIE_MAX_OB 32 struct cdns_pcie_rp_ib_bar { u64 size; -- cgit v1.2.3-58-ga151 From 7aa256234c4c86d8b8fa19a7647051b8fd9721d9 Mon Sep 17 00:00:00 2001 From: Kishon Vijay Abraham I Date: Thu, 10 Dec 2020 18:19:17 +0530 Subject: PCI: j721e: Get offset within "syscon" from "ti,syscon-pcie-ctrl" phandle arg Get "syscon" pcie_ctrl offset from the argument of "ti,syscon-pcie-ctrl" phandle. Previously a subnode to "syscon" node was added which has the exact memory mapped address of pcie_ctrl but now the offset of pcie_ctrl within "syscon" is now being passed as argument to "ti,syscon-pcie-ctrl" phandle. If the offset is not provided in "ti,syscon-pcie-ctrl", the full memory mapped address of pcie_ctrl is used in order to maintain old DT compatibility. This change is as discussed in [1] [1] -> http://lore.kernel.org/r/CAL_JsqKiUcO76bo1GoepWM1TusJWoty_BRy2hFSgtEVMqtrvvQ@mail.gmail.com Link: https://lore.kernel.org/r/20201210124917.24185-5-kishon@ti.com Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Lorenzo Pieralisi Reviewed-by: Rob Herring --- drivers/pci/controller/cadence/pci-j721e.c | 28 +++++++++++++++++++--------- 1 file changed, 19 insertions(+), 9 deletions(-) (limited to 'drivers/pci') diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/controller/cadence/pci-j721e.c index 586b9d69fa5e..dac1ac8a7615 100644 --- a/drivers/pci/controller/cadence/pci-j721e.c +++ b/drivers/pci/controller/cadence/pci-j721e.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -153,7 +154,8 @@ static const struct cdns_pcie_ops j721e_pcie_ops = { .link_up = j721e_pcie_link_up, }; -static int j721e_pcie_set_mode(struct j721e_pcie *pcie, struct regmap *syscon) +static int j721e_pcie_set_mode(struct j721e_pcie *pcie, struct regmap *syscon, + unsigned int offset) { struct device *dev = pcie->dev; u32 mask = J721E_MODE_RC; @@ -164,7 +166,7 @@ static int j721e_pcie_set_mode(struct j721e_pcie *pcie, struct regmap *syscon) if (mode == PCI_MODE_RC) val = J721E_MODE_RC; - ret = regmap_update_bits(syscon, 0, mask, val); + ret = regmap_update_bits(syscon, offset, mask, val); if (ret) dev_err(dev, "failed to set pcie mode\n"); @@ -172,7 +174,7 @@ static int j721e_pcie_set_mode(struct j721e_pcie *pcie, struct regmap *syscon) } static int j721e_pcie_set_link_speed(struct j721e_pcie *pcie, - struct regmap *syscon) + struct regmap *syscon, unsigned int offset) { struct device *dev = pcie->dev; struct device_node *np = dev->of_node; @@ -185,7 +187,7 @@ static int j721e_pcie_set_link_speed(struct j721e_pcie *pcie, link_speed = 2; val = link_speed - 1; - ret = regmap_update_bits(syscon, 0, GENERATION_SEL_MASK, val); + ret = regmap_update_bits(syscon, offset, GENERATION_SEL_MASK, val); if (ret) dev_err(dev, "failed to set link speed\n"); @@ -193,7 +195,7 @@ static int j721e_pcie_set_link_speed(struct j721e_pcie *pcie, } static int j721e_pcie_set_lane_count(struct j721e_pcie *pcie, - struct regmap *syscon) + struct regmap *syscon, unsigned int offset) { struct device *dev = pcie->dev; u32 lanes = pcie->num_lanes; @@ -201,7 +203,7 @@ static int j721e_pcie_set_lane_count(struct j721e_pcie *pcie, int ret; val = LANE_COUNT(lanes - 1); - ret = regmap_update_bits(syscon, 0, LANE_COUNT_MASK, val); + ret = regmap_update_bits(syscon, offset, LANE_COUNT_MASK, val); if (ret) dev_err(dev, "failed to set link count\n"); @@ -212,6 +214,8 @@ static int j721e_pcie_ctrl_init(struct j721e_pcie *pcie) { struct device *dev = pcie->dev; struct device_node *node = dev->of_node; + struct of_phandle_args args; + unsigned int offset = 0; struct regmap *syscon; int ret; @@ -221,19 +225,25 @@ static int j721e_pcie_ctrl_init(struct j721e_pcie *pcie) return PTR_ERR(syscon); } - ret = j721e_pcie_set_mode(pcie, syscon); + /* Do not error out to maintain old DT compatibility */ + ret = of_parse_phandle_with_fixed_args(node, "ti,syscon-pcie-ctrl", 1, + 0, &args); + if (!ret) + offset = args.args[0]; + + ret = j721e_pcie_set_mode(pcie, syscon, offset); if (ret < 0) { dev_err(dev, "Failed to set pci mode\n"); return ret; } - ret = j721e_pcie_set_link_speed(pcie, syscon); + ret = j721e_pcie_set_link_speed(pcie, syscon, offset); if (ret < 0) { dev_err(dev, "Failed to set link speed\n"); return ret; } - ret = j721e_pcie_set_lane_count(pcie, syscon); + ret = j721e_pcie_set_lane_count(pcie, syscon, offset); if (ret < 0) { dev_err(dev, "Failed to set num-lanes\n"); return ret; -- cgit v1.2.3-58-ga151