summaryrefslogtreecommitdiff
path: root/drivers/soc/ti/knav_qmss.h
AgeCommit message (Collapse)Author
2016-02-26soc: TI knav_qmss: fix dma_addr_t printingArnd Bergmann
The knav_qmss driver is currently broken when CONFIG_LPAE is set, which is a bit surprising because I'd expect that any serious users of this platforms would have more than 2GB of RAM and require LPAE. The compiler clearly warns about an incorrect use of dma_addr_t in the debug kernel messages: ti/knav_qmss_queue.c: In function 'knav_queue_setup_region': ti/knav_qmss_queue.c:1025:117: warning: format '%x' expects argument of type 'unsigned int', but argument 9 has type 'dma_addr_t {aka long long unsigned int}' [-Wformat=] ti/knav_qmss_queue.c:1025:117: warning: format '%x' expects argument of type 'unsigned int', but argument 10 has type 'dma_addr_t {aka long long unsigned int}' [-Wformat=] ti/knav_qmss_queue.c: In function 'knav_queue_setup_link_ram': ti/knav_qmss_queue.c:1175:118: warning: format '%x' expects argument of type 'unsigned int', but argument 4 has type 'dma_addr_t {aka long long unsigned int}' [-Wformat=] This patch changes all the debugging output to use the correct %pad format string that works with both 32-bit and 64-bit dma_addr_t. As the variable naming is somewhat confusing here, I also change all *_phys names to *_dma when they refer to bus addresses that are used for DMA rather than a physical memory address as seen from the CPU. This is particularly important on keystone, because the two things are not the same there. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-10-13soc: ti: qmss: make acc queue support optional in the driverMurali Karicheri
acc channels are available only if accumulator PDSP is loaded and running in the SoC. As this requires firmware and user may not have firmware in the file system, make the accumulator queue support available in qmss driver optional. To use accumulator queus user needs to add firmware to the file system and boot up kernel. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2015-10-13soc: ti: add firmware file name as part of the driverMurali Karicheri
Currently firmware file name is included in the DTS. This is not scalable as user has to change the DTS if they need upgrade to a new firmware. Instead, add the firmware file name in the driver itself. As long as there is no API change, new firmware upgrade is easy and require no driver change. User is expected to copy the firmware image to the file system and add a sym link to the new firmware for doing an upgrade. Driver add a array of firmware file names to search for the available firmware blobs. This scheme also prepare the driver for future changes to API if ever happens. In such case it is assumed that driver needs to change to accommodate the new firmware and new firmware file name will get added to the array. Also update the DT document to remove the firmware attribute and add description about firmware in the driver documentation. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2014-10-27soc: ti: Use list_first_entry_or_null() at appropriate placesAxel Lin
Use list_first_entry_or_null() for first_region() and first_queue_range(). list_first_entry() expects the list is not empty, so first_region() and first_queue_range() never return NULL. Thus use list_first_entry_or_null() instead. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2014-09-24soc: ti: add Keystone Navigator QMSS driverSandeep Nair
The QMSS (Queue Manager Sub System) found on Keystone SOCs is one of the main hardware sub system which forms the backbone of the Keystone Multi-core Navigator. QMSS consist of queue managers, packed-data structure processors(PDSP), linking RAM, descriptor pools and infrastructure Packet DMA. The Queue Manager is a hardware module that is responsible for accelerating management of the packet queues. Packets are queued/de-queued by writing or reading descriptor address to a particular memory mapped location. The PDSPs perform QMSS related functions like accumulation, QoS, or event management. Linking RAM registers are used to link the descriptors which are stored in descriptor RAM. Descriptor RAM is configurable as internal or external memory. The QMSS driver manages the PDSP setups, linking RAM regions, queue pool management (allocation, push, pop and notify) and descriptor pool management. The specifics on the device tree bindings for QMSS can be found in: Documentation/devicetree/bindings/soc/keystone-navigator-qmss.txt Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Kumar Gala <galak@codeaurora.org> Cc: Olof Johansson <olof@lixom.net> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Sandeep Nair <sandeep_n@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>