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path: root/drivers/clk/renesas
AgeCommit message (Expand)Author
2023-03-10clk: renesas: r9a06g032: Improve readabilityRalph Siemsen
2023-03-10clk: renesas: r8a77980: Add Z2 clockGeert Uytterhoeven
2023-03-10clk: renesas: r8a77970: Add Z2 clockGeert Uytterhoeven
2023-03-06clk: renesas: r8a77995: Fix VIN parent clockGeert Uytterhoeven
2023-03-06clk: renesas: r8a77980: Add VIN clocksNiklas Söderlund
2023-03-06clk: renesas: r8a779g0: Add VIN clocksNiklas Söderlund
2023-03-06clk: renesas: r8a779g0: Add ISPCS clocksNiklas Söderlund
2023-03-06clk: renesas: r8a779g0: Add CSI-2 clocksNiklas Söderlund
2023-03-06clk: renesas: r8a779g0: Add thermal clockGeert Uytterhoeven
2023-03-06clk: renesas: r8a779g0: Add Audio clocksKuninori Morimoto
2023-03-06clk: renesas: cpg-mssr: Update MSSR register range for R-Car V4HTakeshi Kihara
2023-02-10clk: renesas: rcar-gen3: Disable R-Car H3 ES1.*Wolfram Sang
2023-01-26clk: renesas: r8a779g0: Add CAN-FD clocksGeert Uytterhoeven
2023-01-26clk: renesas: r8a779g0: Tidy up DMAC name on SYS-DMACKuninori Morimoto
2023-01-26clk: renesas: r8a779a0: Tidy up DMAC name on SYS-DMACKuninori Morimoto
2023-01-24clk: renesas: r8a779g0: Add custom clock for PLL2Geert Uytterhoeven
2023-01-23clk: renesas: cpg-mssr: Remove superfluous check in resume codeGeert Uytterhoeven
2023-01-23clk: renesas: r9a06g032: Handle h2mode setting based on USBF presenceHerve Codina
2023-01-12clk: renesas: cpg-mssr: Fix use after free if cpg_mssr_common_init() failedAlexey Khoroshilov
2023-01-12clk: renesas: r9a07g044: Add clock and reset entries for CRULad Prabhakar
2022-12-27clk: renesas: r9a09g011: Add SDHI/eMMC clock and reset entriesPhil Edworthy
2022-12-27clk: renesas: r9a09g011: Add USB clock and reset entriesBiju Das
2022-12-27clk: renesas: r9a09g011: Add TIM clock and reset entriesBiju Das
2022-12-26clk: renesas: r8a779g0: Add display related clocksTomi Valkeinen
2022-12-26clk: renesas: rcar-gen4: Restore PLL enum sort orderGeert Uytterhoeven
2022-12-26clk: renesas: r8a779g0: Fix OSC predividersGeert Uytterhoeven
2022-12-26clk: renesas: r9a09g011: Add PWM clock and reset entriesBiju Das
2022-11-16clk: renesas: r8a779f0: Fix Ethernet Switch clocksGeert Uytterhoeven
2022-11-15clk: renesas: r8a779g0: Add Z0 clock supportGeert Uytterhoeven
2022-11-08clk: renesas: r8a779g0: Add CMT clocksWolfram Sang
2022-11-08clk: renesas: r8a779g0: Add TMU and SASYNCRT clocksWolfram Sang
2022-11-08clk: renesas: r8a779f0: Fix SCIF parent clocksWolfram Sang
2022-11-08clk: renesas: r8a779f0: Fix HSCIF parent clocksWolfram Sang
2022-11-01clk: renesas: r9a06g032: Repair grave increment errorMarek Vasut
2022-10-28clk: renesas: rzg2l: Don't assume all CPG_MOD clocks support PMLad Prabhakar
2022-10-26clk: renesas: rzg2l: Fix typo in struct rzg2l_cpg_priv kerneldocLad Prabhakar
2022-10-26clk: renesas: r8a779a0: Fix SD0H clock nameWolfram Sang
2022-10-26clk: renesas: r8a779g0: Add RPC-IF clockGeert Uytterhoeven
2022-10-26clk: renesas: r8a779g0: Add SDHI clocksGeert Uytterhoeven
2022-10-26clk: renesas: r8a779f0: Add SASYNCPER internal clockGeert Uytterhoeven
2022-10-26clk: renesas: r8a779f0: Fix SD0H clock nameGeert Uytterhoeven
2022-10-26clk: renesas: r9a07g043: Drop WDT2 clock and reset entryLad Prabhakar
2022-10-26clk: renesas: r9a07g044: Drop WDT2 clock and reset entryLad Prabhakar
2022-10-26clk: renesas: r8a779g0: Add TPU clockGeert Uytterhoeven
2022-10-26clk: renesas: r8a779g0: Add PWM clockGeert Uytterhoeven
2022-10-26clk: renesas: r8a779g0: Add SCIF clocksGeert Uytterhoeven
2022-10-26Merge tag 'renesas-clk-fixes-for-v6.1-tag1'Geert Uytterhoeven
2022-10-26clk: renesas: r8a779g0: Fix HSCIF parent clocksGeert Uytterhoeven
2022-10-18clk: renesas: r8a779g0: Add SASYNCPER clocksGeert Uytterhoeven
2022-10-17clk: renesas: r9a07g044: Add MTU3a clock and reset entryBiju Das