summaryrefslogtreecommitdiff
path: root/drivers/clk/at91
AgeCommit message (Expand)Author
2022-10-04Merge branches 'clk-rockchip', 'clk-renesas', 'clk-microchip', 'clk-allwinner...Stephen Boyd
2022-09-15clk: at91: sama5d2: Add Generic Clocks for UART/USARTSergiu Moga
2022-08-19clk: at91: dt-compat: Hold reference returned by of_get_parent()Liang He
2022-05-17clk: at91: generated: consider range when calculating best rateCodrin Ciubotariu
2022-03-29Merge branches 'clk-starfive', 'clk-ti', 'clk-terminate' and 'clk-cleanup' in...Stephen Boyd
2022-03-11clk: cleanup commentsTom Rix
2022-03-08clk: at91: clk-master: remove dead codeClaudiu Beznea
2022-03-08clk: at91: sama7g5: fix parents of PDMCs' GCLKCodrin Ciubotariu
2022-01-24clk: at91: sama7g5: Allow MCK1 to be exported and referenced in DTTudor Ambarus
2022-01-24clk: at91: allow setting PMC_AUDIOPINCK clock parents via DTZixun LI
2021-10-26clk: at91: sama7g5: set low limit for mck0 at 32KHzClaudiu Beznea
2021-10-26clk: at91: sama7g5: remove prescaler part of master clockClaudiu Beznea
2021-10-26clk: at91: clk-master: add notifier for dividerClaudiu Beznea
2021-10-26clk: at91: clk-sam9x60-pll: add notifier for div part of PLLClaudiu Beznea
2021-10-26clk: at91: clk-master: fix prescaler logicClaudiu Beznea
2021-10-26clk: at91: clk-master: mask mckr against layout->maskClaudiu Beznea
2021-10-26clk: at91: clk-master: check if div or pres is zeroClaudiu Beznea
2021-10-26clk: at91: sam9x60-pll: use DIV_ROUND_CLOSEST_ULLClaudiu Beznea
2021-10-26clk: at91: pmc: add sama7g5 to the list of available pmcsClaudiu Beznea
2021-10-26clk: at91: clk-master: improve readability by using local variablesClaudiu Beznea
2021-10-26clk: at91: clk-master: add register definition for sama7g5's master clockClaudiu Beznea
2021-10-26clk: at91: sama7g5: add securam's peripheral clockClaudiu Beznea
2021-10-26clk: at91: pmc: execute suspend/resume only for backup modeClaudiu Beznea
2021-10-26clk: at91: re-factor clocks suspend/resumeClaudiu Beznea
2021-10-07clk: at91: check pmc node status before registering syscore opsClément Léger
2021-09-01Merge branches 'clk-kirkwood', 'clk-imx', 'clk-doc', 'clk-zynq' and 'clk-rali...Stephen Boyd
2021-08-28clk: at91: clk-generated: Limit the requested rate to our rangeCodrin Ciubotariu
2021-08-28clk: at91: sama7g5: remove all kernel-doc & kernel-doc warningsRandy Dunlap
2021-03-13clk: at91: Trivial typo fixes in the file sama7g5.cBhaskar Chowdhury
2021-02-09clk: at91: Fix the declaration of the clocksTudor Ambarus
2020-12-19clk: at91: sam9x60: remove atmel,osc-bypass supportAlexandre Belloni
2020-12-19clk: at91: sama7g5: register cpu clockClaudiu Beznea
2020-12-19clk: at91: clk-master: re-factor master clockClaudiu Beznea
2020-12-19clk: at91: sama7g5: do not allow cpu pll to go higher than 1GHzClaudiu Beznea
2020-12-19clk: at91: sama7g5: decrease lower limit for MCK0 rateClaudiu Beznea
2020-12-19clk: at91: sama7g5: remove mck0 from parent list of other clocksClaudiu Beznea
2020-12-19clk: at91: clk-sam9x60-pll: allow runtime changes for pllClaudiu Beznea
2020-12-19clk: at91: sama7g5: add 5th divisor for mck0 layout and characteristicsEugen Hristev
2020-12-19clk: at91: clk-master: add 5th divisor for mck masterEugen Hristev
2020-12-19clk: at91: sama7g5: allow SYS and CPU PLLs to be exported and referenced in DTEugen Hristev
2020-12-19dt-bindings: clock: at91: add sama7g5 pll definesEugen Hristev
2020-12-19clk: at91: sama7g5: fix compilation errorClaudiu Beznea
2020-10-20Merge branches 'clk-ingenic', 'clk-at91', 'clk-kconfig', 'clk-imx', 'clk-qcom...Stephen Boyd
2020-10-14clk: at91: sam9x60: support only two programmable clocksClaudiu Beznea
2020-10-13clk: at91: clk-sam9x60-pll: remove unused variableClaudiu Beznea
2020-10-13clk: at91: clk-main: update key before writing AT91_CKGR_MORClaudiu Beznea
2020-10-13clk: at91: remove the checking of parent_nameClaudiu Beznea
2020-09-22clk: at91: drop unused at91sam9g45_pcr_layoutKrzysztof Kozlowski
2020-07-24clk: at91: sama7g5: add clock support for sama7g5Claudiu Beznea
2020-07-24clk: at91: clk-utmi: add utmi support for sama7g5Claudiu Beznea