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2019-08-05arm64: dts: fast models: Remove clcd's max-memory-bandwidthKevin Brodsky
It is unclear why max-memory-bandwidth should be set for CLCD on the fast model. Removing that property allows allocating and using 32bpp buffers, which may be desirable on certain platforms such as Android. Reported-by: Ruben Ayrapetyan <ruben.ayrapetyan@arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kevin Brodsky <kevin.brodsky@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-05-28arm64: dts: juno: set the right partition type for NOR flashLinus Walleij
We do not normally access the flash on the Juno, as this will disturb other aspects of the system, but if we choose to do so anyways, we should set up the partitions in the right way so we will find out what is in the flash. The ARM Firmware Suite now has its own compatible and proper device tree bindings to trigger discovery of the flash contents, and Linux supports handling the new type of AFS partitions. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-05-28arm64: dts: juno: update coresight DT bindingsLeo Yan
CoreSight DT bindings have been updated, thus the old compatible strings are obsolete and the drivers will report warning if DTS uses these obsolete strings. This patch switches to the new bindings for CoreSight dynamic funnel, so can dismiss warning during initialisation. Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-01-30Merge tag 'juno-updates-5.1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/dt ARMv8 Juno/fast models updates for v5.1 1. Support for Fixed Virtual Platforms(FVP) Base RevC model to enable development of software around the new features available 2. Addition of dynamic-power-coefficient information for CPUs on Juno 3. Miscellaneous changes like re-ordering device nodes, using existing macros for GIC flags in interrupt-maps and using list instead of tuple(which is wrong but works as number of interrupt cells is 1) for mmci interrupts * tag 'juno-updates-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: arm64: dts: juno: Add cpu dynamic-power-coefficient information arm64: dts: fast models: Add DTS fo Base RevC FVP arm64: dts: juno/fast models: sort couple of device nodes arm64: dts: models: use list instead of tuple for mmci interrupts arm64: dts: juno/fast models: using GIC macros instead of hardcoded values Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-01-30arm64: dts: Remove inconsistent use of 'arm,armv8' compatible stringRob Herring
The 'arm,armv8' compatible string is only for software models. It adds little value otherwise and is inconsistently used as a fallback on some platforms. Remove it from those platforms. This fixes warnings generated by the DT schema. Reported-by: Michal Simek <michal.simek@xilinx.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will.deacon@arm.com> Acked-by: Antoine Tenart <antoine.tenart@bootlin.com> Acked-by: Nishanth Menon <nm@ti.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Chanho Min <chanho.min@lge.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Tero Kristo <t-kristo@ti.com> Acked-by: Wei Xu <xuwei5@hisilicon.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Scott Branden <scott.branden@broadcom.com> Acked-by: Kevin Hilman <khilman@baylibre.com> Acked-by: Chunyan Zhang <zhang.lyra@gmail.com> Acked-by: Robert Richter <rrichter@cavium.com> Acked-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Acked-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-01-29arm64: dts: juno: Add cpu dynamic-power-coefficient informationDietmar Eggemann
A CPUfreq driver, like the scpi driver used on Juno boards, which provide the Energy Model with power cost information via the PM_OPP of_dev_pm_opp_get_cpu_power() function, do need the dynamic-power-coefficient (C) in the device tree. Method used to obtain the C value: C is computed by measuring energy (E) consumption of a frequency domain (FD) over a 10s runtime (t) sysbench workload running at each Operating Performance Point (OPP) affine to 1 or 2 CPUs of that FD while the other CPUs of the system are hotplugged out. By definition all CPUs of a FD have the the same micro-architecture. An OPP is characterized by a certain frequency (f) and voltage (V) value. The corresponding power values (P) are calculated by dividing the delta of the E values between the runs with 2 and 1 CPUs by t. With n data tuples (P, f, V), n equal to number of OPPs for this frequency domain, we can solve C by: P = Pstat + Pdyn P = Pstat + CV²f Cx = (Px - P1)/(Vx²fx - V1²f1) with x = {2, ..., n} The C value is the arithmetic mean out of {C2, ..., Cn}. Since DVFS is broken on Juno r1, no dynamic-power-coefficient information has been added to its dts file. Signed-off-by: Dietmar Eggemann <dietmar.eggemann@arm.com> Signed-off-by: Quentin Perret <quentin.perret@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-01-29arm64: dts: fast models: Add DTS fo Base RevC FVPJean-Philippe Brucker
Fixed Virtual Platforms(FVP) Base RevC model is an emulated Arm platform with GICv3, PCIe, SMMUv3 and various other features. These are available free of charge on the Arm Community website at Arm Development Platforms[1]. It resembles the Foundation Platform, which is a simple FVP that includes an Armv8‑A AEM processor model but this has two cluster of four cores, a CCI-550 interconnect, an SMMU and two PCI devices. In order to enable development of software, let's add a description of the Revison C version of Base platform. The documentation for this FVP model is available @[2] for reference. [1] https://community.arm.com/dev-platforms/ [2] https://static.docs.arm.com/100966/1104/fast_models_fvp_rg_100966_1104_00_en.pdf Cc: Vincent Stehlé <vincent.stehle@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> [sudeep.holla: aligned interrupt-map with other DTS, added SPE, changed PMU to use GIC PPI, moved to PSCI v0.2, commit log rewording] Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-01-29arm64: dts: juno/fast models: sort couple of device nodesSudeep Holla
Sort the couple device nodes with unit addresses which are out of order. Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-01-29arm64: dts: models: use list instead of tuple for mmci interruptsSudeep Holla
RTSM/FVP vexpress motherboard model MMCI requires dedicated interrupts for CMD and PIO, which obviously should be expressed as a list. Current form uses tuple and it works fine since interrupt-cells equal to 1. Acked-by: Liviu Dudau <liviu.dudau@arm.com> Reported-by: Vladimir Murzin <vladimir.murzin@arm.com> Reviewed-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-01-29arm64: dts: juno/fast models: using GIC macros instead of hardcoded valuesSudeep Holla
There are macros that exist to indicate the GIC specific flags and custom cell values as per the GIC DT bindings. It's used in most of the places in these DTS files but not all. To maintain consistency, lets use the macros at all the places. Since DTC doesn't even warn is any cells are missing, it's very hard to debug if that's the case. Changing to use macros avoids missing cells/ columns. Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2018-11-29ARM: dts: Modernize the Vexpress PL111 integrationLinus Walleij
The Versatile Express was submitted with the actual display bridges unconnected (but defined in the device tree) and mock "panels" encoded in the device tree node of the PL111 controller. This doesn't even remotely describe the actual Versatile Express hardware. Exploit the SiI9022 bridge by connecting the PL111 pads to it, making it use EDID or fallback values to drive the monitor. The also has to use the reserved memory through the CMA pool rather than by open coding a memory region and remapping it explicitly in the driver. To achieve this, a reserved-memory node must exist in the root of the device tree, so we need to pull that out of the motherboard .dtsi include files, and push it into each top-level device tree instead. We do the same manouver for all the Versatile Express boards, taking into account the different location of the video RAM depending on which chip select is used on each platform. This plays nicely with the new PL111 DRM driver and follows the standard ways of assigning bridges and memory pools for graphics. Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Mali DP Maintainers <malidp@foss.arm.com> Cc: Robin Murphy <robin.murphy@arm.com> Tested-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-09-11arm64: dts: juno: Enable coresight tmc scatter gather in ETRSuzuki K Poulose
We do not enable scatter-gather mode in the TMC-ETR by default to prevent malfunctioning of systems where the ETR may not be properly connected to the memory subsystem to allow for simultaneous READ/WRITE transactions when used in SG mode. Instead we whitelist the platforms where we know that it is safe to use the mode. All revisions of Juno have a proper ETR connection and hence white list them. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Lorenzo Pierlisi <lorenzo.pieralisi@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2018-09-10arm64: dts: juno: Update entries to match latest coresight bindingsSuzuki K Poulose
Switch to updated coresight bindings for Juno platforms. Cc: Liviu Dudau <liviu.dudau@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> [sudeep.holla: minor modifications to patch title] Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2018-08-24arm64: dts: Fix various entry-method properties to reflect documentationAmit Kucheria
The idle-states binding documentation[1] mentions that the 'entry-method' property is required on 64-bit platforms and must be set to "psci". commit a13f18f59d26 ("Documentation: arm: Fix typo in the idle-states bindings examples") attempted to fix this earlier but clearly more is needed. Fix the cpu-capacity.txt documentation that uses the incorrect value so we don't get copy-paste errors like these. Clarify the language in idle-states.txt by removing the reference to the psci bindings that might be causing this confusion. Finally, fix devicetrees of various boards to reflect current documentation. [1] Documentation/devicetree/bindings/arm/idle-states.txt (see idle-states node) Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2018-05-15Merge tag 'juno-updates-4.18' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt ARMv8 Juno/Vexpress updates/cleanups for v4.18 1. Add the missing connections to the STM output port as all endpoint connections must be bidirectional. 2. Replace all the custom OF graph endpoint node names with the standard 'endpoint' 3. Cleanup to replace all underscores('_') with hyphens('-') in the device node names 4. Syntactic restructuring of motherboard include file so that it can be included at the top of any other DTS file as it should be rather than existing include in the middle of the file at a specific location * tag 'juno-updates-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: arm64: dts: juno/rtsm: re-structure motherboard includes arm64: dts: juno: replace '_' with '-' in node names arm64: dts: juno: Fix "debounce-interval" property misspelling arm64: dts: juno: fix OF graph endpoint node names arm64: dts: juno: fix missing Coresight STM graph connection Signed-off-by: Olof Johansson <olof@lixom.net>
2018-05-15Merge tag 'vexpress-updates-4.18' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt ARMv7 Vexpress updates/cleanups for v4.18 1. Syntactic restructuring of motherboard include file so that it can be included at the top of any other DTS file as it should be rather than existing include in the middle of the file at a specific location 2. Use of standard GPIO controller bindings for few sysreg components like LED, MMC Write Protect/Card Detect and Flash Write Protect to fix some of the new DTC warnings 3. Cleanup to replace all underscores('_') with hyphens('-') in the device node names * tag 'vexpress-updates-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: ARM: dts: vexpress: replace '_' with '-' in node names ARM: dts: vexpress: use standard gpio bindings for sys_{led,mci,flash} ARM: dts: vexpress: Restructure motherboard includes Signed-off-by: Olof Johansson <olof@lixom.net>
2018-05-10arm64: dts: juno/rtsm: re-structure motherboard includesSudeep Holla
It is a bit unorthodox to just include a file in the middle of a another DTS file, it breaks the pattern from other device trees and also makes it really hard to reference things across the files with phandles. Restructure the include for the Juno/RTSM motherboards to happen at the top of the file, reference the target nodes directly, and indent the motherboard .dtsi files to reflect their actual depth in the hierarchy. This is a purely syntactic change that result in the same DTB files from the DTS/DTSI files. This is based on similar patch from Linus Walleij for ARM Vexpress platforms. Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2018-05-10arm64: dts: juno: replace '_' with '-' in node namesSudeep Holla
The latest DTC throws warnings for character '_' in the node names. Warning (node_name_chars_strict): /thermal-zones/big_cluster: Character '_' not recommended in node name Warning (node_name_chars_strict): /thermal-zones/little_cluster: Character '_' not recommended in node name Warning (node_name_chars_strict): /smb@8000000/motherboard/gpio_keys: Character '_' not recommended in node name Warning (node_name_chars_strict): /pmu_a57: Character '_' not recommended in node name Warning (node_name_chars_strict): /pmu_a53: Character '_' not recommended in node name The general recommendation is to use character '-' for all the node names. This patch fixes the warnings following the recommendation. Acked-by: Liviu Dudau <liviu.dudau@arm.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2018-05-10arm64: dts: juno: Fix "debounce-interval" property misspellingSudeep Holla
"debounce_interval" was never supported in the bindings. It should be "debounce-interval". Moreover, latest DTC complains the following: Warning (property_name_chars_strict): debounce_interval: Character '_' not recommended in property name This patch fixes the above warning by using the correct property as per the bindings. Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2018-05-09arm64: dts: juno: fix OF graph endpoint node namesRob Herring
OF graph endpoint node names should be 'endpoint'. Fix the following warnings found by dtc: Warning (graph_endpoint): /hdlcd@7ff50000/port/hdlcd1-endpoint: graph endpont node nameshould be 'endpoint' Warning (graph_endpoint): /hdlcd@7ff60000/port/hdlcd0-endpoint: graph endpont node nameshould be 'endpoint' Warning (graph_endpoint): /i2c@7ffa0000/hdmi-transmitter@70/port/tda998x-0-endpoint: graph endpont node name should be 'endpoint' Warning (graph_endpoint): /i2c@7ffa0000/hdmi-transmitter@71/port/tda998x-1-endpoint: graph endpont node name should be 'endpoint' Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2018-05-09arm64: dts: juno: fix missing Coresight STM graph connectionRob Herring
OF graph endpoint connections must be bidirectional. Fix 2 missing connections to the STM output port: Warning (graph_endpoint): /stm@20100000/port/endpoint: graph connection to node '/funnel@20130000/ports/port@1/endpoint' is not bidirectional Warning (graph_endpoint): /stm@20100000/port/endpoint: graph connection to node '/funnel@20130000/ports/port@1/endpoint' is not bidirectional Fixes: cde6f9ab10c6 ("arm64: dts: juno: add missing CoreSight STM component") Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2018-05-09ARM: dts: vexpress: Restructure motherboard includesLinus Walleij
It is a bit unorthodox to just include a file in the middle of a another DTS file, it breaks the pattern from other device trees and also makes it really hard to reference things across the files with phandles. Restructure the include for the Versatile Express motherboards to happen at the top of the file, reference the target nodes directly, and indent the motherboard .dtsi files to reflect their actual depth in the hierarchy. This is a purely syntactic change that result in the same DTB files from the DTS/DTSI files. Cc: Robin Murphy <robin.murphy@arm.com> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Mali DP Maintainers <malidp@foss.arm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2018-04-16arm64: dts: juno: drop unnecessary address-cells and size-cells propertiesSudeep Holla
/smb@8000000/motherboard/gpio_keys node doesn't have "ranges" or "reg" property in child nodes. So it's unnecessary to have address-cells as well as size-cells properties which results in below warning. Warning (avoid_unnecessary_addr_size): /smb@8000000/motherboard/gpio_keys: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property This patch drops the unnecessary address+size-cell properties. Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2018-02-28arm64: dts: juno: fix size of GICv2m MSI framesSudeep Holla
Currently the size of GICv2m MSI frames are listed as 4kB while the Juno TRM specifies 64kB for each of these MSI frames. Though the devices connected themselves might just use the first 4kB, to be consistent with the general practice of 64kB boundary alignment to all the devices, let's keep the size as 64kB. This might also help in avoiding any surprise when passing the device to a VM. This patch increases the size of each GICv2m MSI frames from 4kB to 64kB as per the specification. Cc: Liviu Dudau <liviu.dudau@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2018-02-26arm64: dts: juno: Describe the full GICv2m regionRobin Murphy
Juno's GICv2m implementation consists of four frames providing 32 interrupts each. Since it is possible to plug in enough PCIe endpoints to consume more than 32 MSIs, and the driver already has a bodge to handle multiple frames, let's expose the other three as well. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2017-11-16Merge tag 'armsoc-dt' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM device-tree updates from Arnd Bergmann: "We add device tree files for a couple of additional SoCs in various areas: Allwinner R40/V40 for entertainment, Broadcom Hurricane 2 for networking, Amlogic A113D for audio, and Renesas R-Car V3M for automotive. As usual, lots of new boards get added based on those and other SoCs: - Actions S500 based CubieBoard6 single-board computer - Amlogic Meson-AXG A113D based development board - Amlogic S912 based Khadas VIM2 single-board computer - Amlogic S912 based Tronsmart Vega S96 set-top-box - Allwinner H5 based NanoPi NEO Plus2 single-board computer - Allwinner R40 based Banana Pi M2 Ultra and Berry single-board computers - Allwinner A83T based TBS A711 Tablet - Broadcom Hurricane 2 based Ubiquiti UniFi Switch 8 - Broadcom bcm47xx based Luxul XAP-1440/XAP-810/ABR-4500/XBR-4500 wireless access points and routers - NXP i.MX51 based Zodiac Inflight Innovations RDU1 board - NXP i.MX53 based GE Healthcare PPD biometric monitor - NXP i.MX6 based Pistachio single-board computer - NXP i.MX6 based Vining-2000 automotive diagnostic interface - NXP i.MX6 based Ka-Ro TX6 Computer-on-Module in additional variants - Qualcomm MSM8974 (Snapdragon 800) based Fairphone 2 phone - Qualcomm MSM8974pro (Snapdragon 801) based Sony Xperia Z2 Tablet - Realtek RTD1295 based set-top-boxes MeLE V9 and PROBOX2 AVA - Renesas R-Car V3M (R8A77970) SoC and "Eagle" reference board - Renesas H3ULCB and M3ULCB "Kingfisher" extension infotainment boards - Renasas r8a7745 based iWave G22D-SODIMM SoM - Rockchip rk3288 based Amarula Vyasa single-board computer - Samsung Exynos5800 based Odroid HC1 single-board computer For existing SoC support, there was a lot of ongoing work, as usual most of that concentrated on the Renesas, Rockchip, OMAP, i.MX, Amlogic and Allwinner platforms, but others were also active. Rob Herring and many others worked on reducing the number of issues that the latest version of 'dtc' now warns about. Unfortunately there is still a lot left to do. A rework of the ARM foundation model introduced several new files for common variations of the model" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (599 commits) arm64: dts: uniphier: route on-board device IRQ to GPIO controller for PXs3 dt-bindings: bus: Add documentation for the Technologic Systems NBUS arm64: dts: actions: s900-bubblegum-96: Add fake uart5 clock ARM: dts: owl-s500: Add CubieBoard6 dt-bindings: arm: actions: Add CubieBoard6 ARM: dts: owl-s500-guitar-bb-rev-b: Add fake uart3 clock ARM: dts: owl-s500: Set power domains for CPU2 and CPU3 arm: dts: mt7623: remove unused compatible string for pio node arm: dts: mt7623: update usb related nodes arm: dts: mt7623: update crypto node ARM: dts: sun8i: a711: Enable USB OTG ARM: dts: sun8i: a711: Add regulator support ARM: dts: sun8i: a83t: bananapi-m3: Enable AP6212 WiFi on mmc1 ARM: dts: sun8i: a83t: cubietruck-plus: Enable AP6330 WiFi on mmc1 ARM: dts: sun8i: a83t: Move mmc1 pinctrl setting to dtsi file ARM: dts: sun8i: a83t: allwinner-h8homlet-v2: Add AXP818 regulator nodes ARM: dts: sun8i: a83t: bananapi-m3: Add AXP813 regulator nodes ARM: dts: sun8i: a83t: cubietruck-plus: Add AXP818 regulator nodes ARM: dts: sunxi: Add dtsi for AXP81x PMIC arm64: dts: allwinner: H5: Restore EMAC changes ...
2017-11-14Merge tag 'devicetree-for-4.15' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull DeviceTree updates from Rob Herring: "A bigger diffstat than usual with the kbuild changes and a tree wide fix in the binding documentation. Summary: - kbuild cleanups and improvements for dtbs - Code clean-up of overlay code and fixing for some long standing memory leak and race condition in applying overlays - Improvements to DT memory usage making sysfs/kobjects optional and skipping unflattening of disabled nodes. This is part of kernel tinification efforts. - Final piece of removing storing the full path for every DT node. The prerequisite conversion of printk's to use device_node format specifier happened in 4.14. - Sync with current upstream dtc. This brings additional checks to dtb compiling. - Binding doc tree wide removal of leading 0s from examples - RTC binding documentation adding missing devices and some consolidation of duplicated bindings - Vendor prefix documentation for nutsboard, Silicon Storage Technology, shimafuji, Tecon Microprocessor Technologies, DH electronics GmbH, Opal Kelly, and Next Thing" * tag 'devicetree-for-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (55 commits) dt-bindings: usb: add #phy-cells to usb-nop-xceiv dt-bindings: Remove leading zeros from bindings notation kbuild: handle dtb-y and CONFIG_OF_ALL_DTBS natively in Makefile.lib MIPS: dts: remove bogus bcm96358nb4ser.dtb from dtb-y entry kbuild: clean up *.dtb and *.dtb.S patterns from top-level Makefile .gitignore: move *.dtb and *.dtb.S patterns to the top-level .gitignore .gitignore: sort normal pattern rules alphabetically dt-bindings: add vendor prefix for Next Thing Co. scripts/dtc: Update to upstream version v1.4.5-6-gc1e55a5513e9 of: dynamic: fix memory leak related to properties of __of_node_dup of: overlay: make pr_err() string unique of: overlay: pr_err from return NOTIFY_OK to overlay apply/remove of: overlay: remove unneeded check for NULL kbasename() of: overlay: remove a dependency on device node full_name of: overlay: simplify applying symbols from an overlay of: overlay: avoid race condition between applying multiple overlays of: overlay: loosen overly strict phandle clash check of: overlay: expand check of whether overlay changeset can be removed of: overlay: detect cases where device tree may become corrupt of: overlay: minor restructuring ...
2017-11-09kbuild: handle dtb-y and CONFIG_OF_ALL_DTBS natively in Makefile.libMasahiro Yamada
If CONFIG_OF_ALL_DTBS is enabled, "make ARCH=arm64 dtbs" compiles each DTB twice; one from arch/arm64/boot/dts/*/Makefile and the other from the dtb-$(CONFIG_OF_ALL_DTBS) line in arch/arm64/boot/dts/Makefile. It could be a race problem when building DTBS in parallel. Another minor issue is CONFIG_OF_ALL_DTBS covers only *.dts in vendor sub-directories, so this broke when Broadcom added one more hierarchy in arch/arm64/boot/dts/broadcom/<soc>/. One idea to fix the issues in a clean way is to move DTB handling to Kbuild core scripts. Makefile.dtbinst already recognizes dtb-y natively, so it should not hurt to do so. Add $(dtb-y) to extra-y, and $(dtb-) as well if CONFIG_OF_ALL_DTBS is enabled. All clutter things in Makefiles go away. As a bonus clean-up, I also removed dts-dirs. Just use subdir-y directly to traverse sub-directories. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Arnd Bergmann <arnd@arndb.de> [robh: corrected BUILTIN_DTB to CONFIG_BUILTIN_DTB] Signed-off-by: Rob Herring <robh@kernel.org>
2017-11-08kbuild: clean up *.dtb and *.dtb.S patterns from top-level MakefileMasahiro Yamada
We need to add "clean-files" in Makfiles to clean up DT blobs, but we often miss to do so. Since there are no source files that end with .dtb or .dtb.S, so we can clean-up those files from the top-level Makefile. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Rob Herring <robh@kernel.org>
2017-11-02License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-10-20Merge tag 'juno-updates-4.15' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/soc Pull "ARMv8 Vexpress/Juno DT update for v4.15" from Sudeep Holla: Just single update to enable PSCI support on Foundation models * tag 'juno-updates-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: arm64: dts: foundation-v8: Enable PSCI mode
2017-10-20arm64: dts: fix unit-address leading 0sRob Herring
Fix dtc warnings for 'simple_bus_reg' due to leading 0s. Converted using the following command: perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find arch/arm64/boot/dts -type -f -name '*.dts*' Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-10-03arm64: dts: foundation-v8: Enable PSCI modeDaniel Thompson
Currently if the Foundation model is running ARM Trusted Firmware then the kernel, which is configured to use spin tables, cannot start secondary processors or "power off" the simulation. After adding a couple of labels to the include file and splitting out the spin-table configuration into a header, we add a couple of new headers together with two new DTs (GICv2 + PSCI and GICv3 + PSCI). The new GICv3+PSCI DT has been boot tested, the remaining three (two of which existed prior to this patch) have been "tested" by decompiling the blobs and comparing them against a reference. Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2017-08-02arm64: dts: juno: replace underscores with hyphen in device node namesSudeep Holla
Since underscores('_') are not allowed in the device tree nodes names, replace all of them with hyphen('-') in device node names. Note that underscores are however allowed in labels. Reported-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2017-08-02arm64: dts: juno: Use the new coresight replicator stringSuzuki K. Poulose
Use the new compatible for ATB programmable replicator in Juno. Cc: Mike Leach <mike.leach@linaro.org> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2017-05-19arm64: dts: juno: enable some SMMUsRobin Murphy
The IOMMU-backed DMA API support has now been in place for a while and proven stable, so there's no real need to keep most of Juno's SMMUs disabled. The USB, HDLCDs, and CoreSight ETR all just need to map RAM buffers for DMA - enabling their SMMUs obviates CPU bounce buffering for USB's streaming DMA to the upper memory bank, and lets the other two allocate their relatively large coherent buffers without pressuring CMA. Some more software work is still needed for the DMA-330 and PCIe before those can accommodate SMMU translation correctly in all cases, so we leave those alone for now. Tested-by: Liviu Dudau <Liviu.Dudau@arm.com> [only HDLCD] Acked-by: Liviu Dudau <Liviu.Dudau@arm.com> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2017-05-19arm64: dts: juno: add coresight CPU debug nodesSuzuki K Poulose
Add Coresight CPU debug nodes for Juno r0, r1 & r2. The CPU debug areas are mapped at the same address for all revisions, like the ETM, even though the CPUs have changed from r1 to r2. Cc: Leo Yan <leo.yan@linaro.org> Cc: Mathieu Poirier <mathieu.porier@linaro.org> Cc: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> [arranged nodes in ascending order with respect to register addresses] Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2017-04-19arm64: dts: juno: add information about L1 and L2 cachesSudeep Holla
Commit a8d4636f96ad ("arm64: cacheinfo: Remove CCSIDR-based cache information probing") removed mechanism to extract cache information based on CCSIDR register as the architecture explicitly states no inference about the actual sizes of caches based on CCSIDR registers. Commit 9a802431c527 ("arm64: cacheinfo: add support to override cache levels via device tree") had already provided options to override cache information from the device tree. This patch adds the information about L1 and L2 caches on all variants of Juno platform. Cc: Will Deacon <will.deacon@arm.com> Cc: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2017-04-19arm64: dts: juno: fix few unit address format warningsSudeep Holla
This patch fixes the following set of warnings on juno. smb@08000000 unit name should not have leading 0s sysctl@020000 simple-bus unit address format error, expected "20000" apbregs@010000 simple-bus unit address format error, expected "10000" mmci@050000 simple-bus unit address format error, expected "50000" kmi@060000 simple-bus unit address format error, expected "60000" kmi@070000 simple-bus unit address format error, expected "70000" wdt@0f0000 simple-bus unit address format error, expected "f0000" Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2017-03-31arm64: dts: juno: fix PCI bus dtc warningsRob Herring
dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2017-03-02Merge tag 'juno-fixes-4.11' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/late Merge "ARMv8 Juno DT fix for v4.11" from Sudeep Holla: Just single patch to fix replicator in order to prevent overflows at the source and reduce the back pressure by splitting the trace output to TPIU and ETR. * tag 'juno-fixes-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: arm64: dts: juno: update definition for programmable replicator
2017-02-21arm64: dts: juno: update definition for programmable replicatorMike Leach
Juno platforms have a programmable replicator splitting the trace output to TPIU and ETR. Currently this is not being programmed as it is being treated as a none-programmable replicator - which is the default operational mode for these devices. The TPIU in the system is enabled by default, and this combination is causing back-pressure in the trace system resulting in overflows at the source. Replaces the existing definition with one that defines the programmable replicator, using the "qcom,coresight-replicator1x" driver that provides the correct functionality for CoreSight programmable replicators. Reviewed-and-Tested-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2017-01-18Merge tag 'juno-updates-4.11' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt64 ARMv8 Vexpress/Juno DT updates for v4.11 1. Addition of Coresight support on Juno R1 and R2 variants 2. Addition of STM(System Trace Macrocell) support on all Juno variants 3. Removed incorrect nesting of dtsi files 4. Removed untested USB hub only available on initial Juno R0 motherboard 5. Added ETR SMMU power domain and dma-ranges property * tag 'juno-updates-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: arm64: dts: juno: remove motherboard USB node arm64: dts: juno: add ETR SMMU power domain arm64: dts: juno: add dma-ranges property arm64: dts: juno: add missing CoreSight STM component arm64: dts: juno: add CoreSight support for Juno r1/r2 variants arm64: dts: juno: refactor CoreSight support on Juno r0 arm64: dts: juno: remove dtsi nesting inside tree structure Signed-off-by: Olof Johansson <olof@lixom.net>
2017-01-18arm64: dts: juno: remove motherboard USB nodeRobin Murphy
The first batch of Juno boards included a discrete USB controller chip as a contingency in case of issues with the USB 2.0 IP integrated into the SoC. As it turned out, the latter was fine, and to the best of my knowledge the motherboard USB was never even brought up and validated. Since this also isn't present on later boards, and uses a compatible string undocumented and unmatched by any driver in the kernel, let's just tidy it away for ever to avoid any confusion. Acked-by: Liviu Dudau <Liviu.Dudau@arm.com> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2017-01-18arm64: dts: juno: add ETR SMMU power domainRobin Murphy
It is not at all clear from the documentation, but straightforward to determine in practice, that the ETR SMMU is actually in the DEBUGSYS power domain. Add that to the DT so that anyone brave enough to enable said SMMU doesn't experience a system lockup on boot, especially a sneaky one which goes away as soon as you connect an external debugger to have a look at where it's stuck (thus powering up DEBUGSYS by other means and allowing it to make progress again before actually halting...) Acked-by: Liviu Dudau <Liviu.Dudau@arm.com> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2017-01-18arm64: dts: juno: add dma-ranges propertyRobin Murphy
The interconnects around Juno have a 40-bit address width, and DMA masters have no restrictions beyond their own individual limitations. Describe this to ensure that DT-based DMA masks get set up correctly for all devices capable of 40-bit addressing. Acked-by: Liviu Dudau <Liviu.Dudau@arm.com> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2017-01-18arm64: dts: juno: add missing CoreSight STM componentMike Leach
This patch adds the missing CoreSight STM component definition to the device tree of all the juno variants(r0,r1,r2) STM component is connected to different funnels depending on Juno platform variant. Reviewed-and-tested-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mike Leach <mike.leach@linaro.org> [sudeep.holla@arm.com: minor changelog update and reorganising the STM node back into juno-base.dtsi to avoid duplication] Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2017-01-18arm64: dts: juno: add CoreSight support for Juno r1/r2 variantsMike Leach
The CoreSight support added for Juno is valid for only Juno r0. The Juno r1 and r2 variants have additional components and alternative connection routes between trace source and sinks. This patch builds on top of the existing r0 support and extends it to Juno r1/r2 variants. Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mike Leach <mike.leach@linaro.org> [sudeep.holla@arm.com: minor changelog update and major reorganisation of the common coresight components back into juno-base.dtsi to avoid duplication, also renamed funnel node names] Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2017-01-18arm64: dts: juno: refactor CoreSight support on Juno r0Sudeep Holla
Currently the Coresight components are supported only on Juno r0 variant. In preparation to add support to Juno r1/r2 variants, this patch refactors the existing coresight device nodes so that r1/r2 support can be added easily. It also cleans up some of the device node names which were previously named so as they were confused as the labels rather than the node names. Reviewed-and-tested-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2017-01-18arm64: dts: juno: remove dtsi nesting inside tree structureSudeep Holla
Currently juno-clock.dtsi and juno-base.dtsi are nested badly inside the device tree structure. It's generally good practice to ensure that individual dtsi stand by themselves at the top of the file. This patch removes the nesting of the above mentioned dtsi files and makes them independent. Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>